Datasheet
Table Of Contents
- Small Footprint RMII 10/100 Ethernet Transceiver with HP Auto-MDIX Support
- 1.0 Introduction
- 2.0 Pin Description and Configuration
- 3.0 Functional Description
- 3.1 Transceiver
- 3.2 Auto-negotiation
- 3.3 HP Auto-MDIX Support
- 3.4 MAC Interface
- 3.5 Serial Management Interface (SMI)
- 3.6 Interrupt Management
- 3.7 Configuration Straps
- 3.8 Miscellaneous Functions
- 3.9 Application Diagrams
- 4.0 Register Descriptions
- 4.1 Register Nomenclature
- 4.2 Control and Status Registers
- TABLE 4-2: SMI Register Map
- 4.2.1 Basic Control Register
- 4.2.2 Basic Status Register
- 4.2.3 PHY Identifier 1 Register
- 4.2.4 PHY Identifier 2 Register
- 4.2.5 Auto Negotiation Advertisement Register
- 4.2.6 Auto Negotiation Link Partner Ability Register
- 4.2.7 Auto Negotiation Expansion Register
- 4.2.8 Mode Control/Status Register
- 4.2.9 Special Modes Register
- 4.2.10 Symbol Error Counter Register
- 4.2.11 Special Control/Status Indications Register
- 4.2.12 Interrupt Source Flag Register
- 4.2.13 Interrupt Mask Register
- 4.2.14 PHY Special Control/Status Register
- 5.0 Operational Characteristics
- 6.0 Package Information
- 7.0 Application Notes
- Appendix A: Data Sheet Revision History
- The Microchip Web Site
- Customer Change Notification Service
- Customer Support
- Product Identification System
- Worldwide Sales and Service

2016 Microchip Technology Inc. DS00002165B-page 63
LAN8720A/LAN8720AI
5.6 Clock Circuit
The device can accept either a 25MHz crystal (preferred) or a 25MHz single-ended clock oscillator (±50ppm) input. If
the single-ended clock oscillator method is implemented, XTAL2 should be left unconnected and XTAL1/CLKIN should
be driven with a nominal 0-3.3V clock signal.
It is recommended that a crystal utilizing matching parallel l
oad capacitors be used for the crystal input/output signals
(XTAL1/XTAL2). Either a 300uW or 100uW 25MHz crystal may be utilized. The 300uW 25MHz crystal specifications are
detailed in Section 5.6.1, "300uW 25MHz Crystal Specification," on page 65. The 100uW 25MHz crystal specifications
are detailed in Section 5.6.2, "100uW 25MHz Crystal Specification," on page 66.
5.6.1 300UW 25MHZ CRYSTAL SPECIFICATION
When utilizing a 300uW 25MHz crystal, the following circuit design (Figure 5-8) and specifications (Table 5-12) are
required to ensure proper operation.
FIGURE 5-7: 300UW 25MHZ CRYSTAL CIRCUIT
LAN8720
XTAL2
XTAL1
Y1
C
1
C
2
TABLE 5-13: 300UW 25MHZ CRYSTAL SPECIFICATIONS
Parameter Symbol Min Nom Max Units Notes
Crystal Cut AT, typ —
Crystal Oscillation Mode Fundamental Mode —
Crystal Calibration Mode Parallel Resonant Mode —
Frequency F
fund
— 25.000 — MHz —
Frequency Tolerance @ 25
o
C F
tol
— — ±50 PPM Note 5-26
Frequency Stability Over Temp F
temp
— — ±50 PPM Note 5-26
Frequency Deviation Over Time F
age
— +/-3 to 5 — PPM Note 5-27
Total Allowable PPM Budget — — — ±50 PPM Note 5-28
Shunt Capacitance C
O
— 7 typ — pF —
Load Capacitance C
L
— 20 typ — pF —
Drive Level P
W
300 — — uW —
Equivalent Series Resistance R
1
— — 30 Ohm —
Operating Temperature Range — Note 5-35 — +85
o
C —
XTAL1/CLKIN Pin Capacitance — — 3 typ — pF Note 5-30
XTAL2 Pin Capacitance — — 3 typ — pF Note 5-30