Datasheet
Table Of Contents
- Small Footprint RMII 10/100 Ethernet Transceiver with HP Auto-MDIX Support
- 1.0 Introduction
- 2.0 Pin Description and Configuration
- 3.0 Functional Description
- 3.1 Transceiver
- 3.2 Auto-negotiation
- 3.3 HP Auto-MDIX Support
- 3.4 MAC Interface
- 3.5 Serial Management Interface (SMI)
- 3.6 Interrupt Management
- 3.7 Configuration Straps
- 3.8 Miscellaneous Functions
- 3.9 Application Diagrams
- 4.0 Register Descriptions
- 4.1 Register Nomenclature
- 4.2 Control and Status Registers
- TABLE 4-2: SMI Register Map
- 4.2.1 Basic Control Register
- 4.2.2 Basic Status Register
- 4.2.3 PHY Identifier 1 Register
- 4.2.4 PHY Identifier 2 Register
- 4.2.5 Auto Negotiation Advertisement Register
- 4.2.6 Auto Negotiation Link Partner Ability Register
- 4.2.7 Auto Negotiation Expansion Register
- 4.2.8 Mode Control/Status Register
- 4.2.9 Special Modes Register
- 4.2.10 Symbol Error Counter Register
- 4.2.11 Special Control/Status Indications Register
- 4.2.12 Interrupt Source Flag Register
- 4.2.13 Interrupt Mask Register
- 4.2.14 PHY Special Control/Status Register
- 5.0 Operational Characteristics
- 6.0 Package Information
- 7.0 Application Notes
- Appendix A: Data Sheet Revision History
- The Microchip Web Site
- Customer Change Notification Service
- Customer Support
- Product Identification System
- Worldwide Sales and Service

Bits Description Type Default
15:8 RESERVED RO —
7 INT7
0 = not source of interrupt
1 = ENERGYON generated
RO/LH 0b
6 INT6
0 = not source of interrupt
1 = Auto-Negotiation complete
RO/LH 0b
5 INT5
0 = not source of interrupt
1 = Remote Fault Detected
RO/LH 0b
4 INT4
0 = not source of interrupt
1 = Link Down (link status negated)
RO/LH 0b
3 INT3
0 = not source of interrupt
1 = Auto-Negotiation LP Acknowledge
RO/LH 0b
2 INT2
0 = not source of interrupt
1 = Parallel Detection Fault
RO/LH 0b
1 INT1
0 = not source of interrupt
1 = Auto-Negotiation Page Received
RO/LH 0b
0 RESERVED RO 0b
LAN8720A/LAN8720AI
DS00002165B-page 50 2016 Microchip Technology Inc.
4.2.13 INTERRUPT MASK REGISTER
Index (In Decimal): 30 Size: 16 bits
Bits Description Type Default
15:8 RESERVED RO —
7:1 Mask Bits
0 = interrupt source is masked
1 = interrupt source is enabled
Note: Re
fer to Section 4.2.12, Interrupt Source Flag Register for details
on the corresponding interrupt definitions.
R/W 0000000b
0 RESERVED RO —