Datasheet
Table Of Contents
- Small Footprint RMII 10/100 Ethernet Transceiver with HP Auto-MDIX Support
- 1.0 Introduction
- 2.0 Pin Description and Configuration
- 3.0 Functional Description
- 3.1 Transceiver
- 3.2 Auto-negotiation
- 3.3 HP Auto-MDIX Support
- 3.4 MAC Interface
- 3.5 Serial Management Interface (SMI)
- 3.6 Interrupt Management
- 3.7 Configuration Straps
- 3.8 Miscellaneous Functions
- 3.9 Application Diagrams
- 4.0 Register Descriptions
- 4.1 Register Nomenclature
- 4.2 Control and Status Registers
- TABLE 4-2: SMI Register Map
- 4.2.1 Basic Control Register
- 4.2.2 Basic Status Register
- 4.2.3 PHY Identifier 1 Register
- 4.2.4 PHY Identifier 2 Register
- 4.2.5 Auto Negotiation Advertisement Register
- 4.2.6 Auto Negotiation Link Partner Ability Register
- 4.2.7 Auto Negotiation Expansion Register
- 4.2.8 Mode Control/Status Register
- 4.2.9 Special Modes Register
- 4.2.10 Symbol Error Counter Register
- 4.2.11 Special Control/Status Indications Register
- 4.2.12 Interrupt Source Flag Register
- 4.2.13 Interrupt Mask Register
- 4.2.14 PHY Special Control/Status Register
- 5.0 Operational Characteristics
- 6.0 Package Information
- 7.0 Application Notes
- Appendix A: Data Sheet Revision History
- The Microchip Web Site
- Customer Change Notification Service
- Customer Support
- Product Identification System
- Worldwide Sales and Service

2016 Microchip Technology Inc. DS00002165B-page 43
LAN8720A/LAN8720AI
Note 4-1 The default value of this bit is determined by the MODE[2:0] configuration straps. Refer to
Section 3.7.2, MODE[2:0]: Mode Configuration for additional information.
4.2.2 BASIC STATUS REGISTER
Index (In Decimal): 1 Size: 16 bits
11 Power Down
0 = normal operation
1 = General power down mode
The Auto-Negotiation Enable must be cleared before setting the Power
Do
wn.
R/W 0b
10 Isolate
0 = normal operation
1 = electrical isolation of PHY from the RMII
R/W 0b
9 Restart Auto-Negotiate
0 = normal operation
1 = restart auto-negotiate process
Bit is self-clearing.
R/W
SC
0b
8 Duplex Mode
0 = half duplex
1 = full duplex
Ignored if Auto-Negotiation is enabled (0.12 = 1).
R/W Note 4-1
7:0 RESERVED RO —
Bits Description Type Default
15 100BASE-T4
0 = no T4 ability
1 = T4 able
RO 0b
14 100BASE-TX Full Duplex
0 = no TX full duplex ability
1 = TX with full duplex
RO 1b
13 100BASE-TX Half Duplex
0 = no TX half duplex ability
1 = TX with half duplex
RO 1b
12 10BASE-T Full Duplex
0 = no 10Mbps with full duplex ability
1 = 10Mbps with full duplex
RO 1b
11 10BASE-T Half Duplex
0 = no 10Mbps with half duplex ability
1 = 10Mbps with half duplex
RO 1b
10 100BASE-T2 Full Duplex
0 = PHY not able to perform full duplex 100BASE-T2
1 = PHY able to perform full duplex 100BASE-T2
RO 0b
Bits Description Type Default