Datasheet

Table Of Contents
2016 Microchip Technology Inc. DS00002165B-page 43
LAN8720A/LAN8720AI
Note 4-1 The default value of this bit is determined by the MODE[2:0] configuration straps. Refer to
Section 3.7.2, MODE[2:0]: Mode Configuration for additional information.
4.2.2 BASIC STATUS REGISTER
Index (In Decimal): 1 Size: 16 bits
11 Power Down
0 = normal operation
1 = General power down mode
The Auto-Negotiation Enable must be cleared before setting the Power
Do
wn.
R/W 0b
10 Isolate
0 = normal operation
1 = electrical isolation of PHY from the RMII
R/W 0b
9 Restart Auto-Negotiate
0 = normal operation
1 = restart auto-negotiate process
Bit is self-clearing.
R/W
SC
0b
8 Duplex Mode
0 = half duplex
1 = full duplex
Ignored if Auto-Negotiation is enabled (0.12 = 1).
R/W Note 4-1
7:0 RESERVED RO
Bits Description Type Default
15 100BASE-T4
0 = no T4 ability
1 = T4 able
RO 0b
14 100BASE-TX Full Duplex
0 = no TX full duplex ability
1 = TX with full duplex
RO 1b
13 100BASE-TX Half Duplex
0 = no TX half duplex ability
1 = TX with half duplex
RO 1b
12 10BASE-T Full Duplex
0 = no 10Mbps with full duplex ability
1 = 10Mbps with full duplex
RO 1b
11 10BASE-T Half Duplex
0 = no 10Mbps with half duplex ability
1 = 10Mbps with half duplex
RO 1b
10 100BASE-T2 Full Duplex
0 = PHY not able to perform full duplex 100BASE-T2
1 = PHY able to perform full duplex 100BASE-T2
RO 0b
Bits Description Type Default