Datasheet
Table Of Contents
- Small Footprint RMII 10/100 Ethernet Transceiver with HP Auto-MDIX Support
- 1.0 Introduction
- 2.0 Pin Description and Configuration
- 3.0 Functional Description
- 3.1 Transceiver
- 3.2 Auto-negotiation
- 3.3 HP Auto-MDIX Support
- 3.4 MAC Interface
- 3.5 Serial Management Interface (SMI)
- 3.6 Interrupt Management
- 3.7 Configuration Straps
- 3.8 Miscellaneous Functions
- 3.9 Application Diagrams
- 4.0 Register Descriptions
- 4.1 Register Nomenclature
- 4.2 Control and Status Registers
- TABLE 4-2: SMI Register Map
- 4.2.1 Basic Control Register
- 4.2.2 Basic Status Register
- 4.2.3 PHY Identifier 1 Register
- 4.2.4 PHY Identifier 2 Register
- 4.2.5 Auto Negotiation Advertisement Register
- 4.2.6 Auto Negotiation Link Partner Ability Register
- 4.2.7 Auto Negotiation Expansion Register
- 4.2.8 Mode Control/Status Register
- 4.2.9 Special Modes Register
- 4.2.10 Symbol Error Counter Register
- 4.2.11 Special Control/Status Indications Register
- 4.2.12 Interrupt Source Flag Register
- 4.2.13 Interrupt Mask Register
- 4.2.14 PHY Special Control/Status Register
- 5.0 Operational Characteristics
- 6.0 Package Information
- 7.0 Application Notes
- Appendix A: Data Sheet Revision History
- The Microchip Web Site
- Customer Change Notification Service
- Customer Support
- Product Identification System
- Worldwide Sales and Service

TABLE 4-2: SMI REGISTER MAP
Register Index
(Decimal)
Register Name Group
0 Basic Control Register Basic
1 Basic Status Register Basic
2 PHY Identifier 1 Extended
3 PHY Identifier 2 Extended
4 Auto-Negotiation Advertisement Register Extended
5 Auto-Negotiation Link P
artner Ability Register Extended
6 Auto-Negotiation Expansion Register Extended
17 Mode Control/Status Register Vendor-specific
18 Special Modes Vendor-specific
26 Symbol Error Counter Register Vendor-specific
27 Control / Status Indication Register Vendor-specific
29 Interrupt Source Register Vendor-specific
30 Interrupt Mask Register Vendor-specific
31 PHY Special Control/Status Register Vendor-specific
LAN8720A/LAN8720AI
DS00002165B-page 42 2016 Microchip Technology Inc.
4.2.1 BASIC CONTROL REGISTER
Index (In Decimal): 0 Size: 16 bits
Bits Description Type Default
15 Soft Reset
1 = software reset. Bit is self-clearing. When setting this bit do not set other
bi
ts in this register. The configuration (as described in Section 3.7.2,
MODE[2:0]: Mode Configuration) is set from the register bit values, and not
from the mode pins.
R/W
SC
0b
14 Loopback
0 = normal operation
1 = loopback mode
R/W 0b
13 Speed Select
0 = 10Mbps
1 = 100Mbps
Ignored if Auto-negotiation is enabled (0.12 = 1).
R/W Note 4-1
12 Auto-Negotiation Enable
0 = disable auto-negotiate process
1 = enable auto-negotiate process (overrides 0.13 and 0.8)
R/W Note 4-1