Datasheet
Table Of Contents
- Small Footprint RMII 10/100 Ethernet Transceiver with HP Auto-MDIX Support
- 1.0 Introduction
- 2.0 Pin Description and Configuration
- 3.0 Functional Description
- 3.1 Transceiver
- 3.2 Auto-negotiation
- 3.3 HP Auto-MDIX Support
- 3.4 MAC Interface
- 3.5 Serial Management Interface (SMI)
- 3.6 Interrupt Management
- 3.7 Configuration Straps
- 3.8 Miscellaneous Functions
- 3.9 Application Diagrams
- 4.0 Register Descriptions
- 4.1 Register Nomenclature
- 4.2 Control and Status Registers
- TABLE 4-2: SMI Register Map
- 4.2.1 Basic Control Register
- 4.2.2 Basic Status Register
- 4.2.3 PHY Identifier 1 Register
- 4.2.4 PHY Identifier 2 Register
- 4.2.5 Auto Negotiation Advertisement Register
- 4.2.6 Auto Negotiation Link Partner Ability Register
- 4.2.7 Auto Negotiation Expansion Register
- 4.2.8 Mode Control/Status Register
- 4.2.9 Special Modes Register
- 4.2.10 Symbol Error Counter Register
- 4.2.11 Special Control/Status Indications Register
- 4.2.12 Interrupt Source Flag Register
- 4.2.13 Interrupt Mask Register
- 4.2.14 PHY Special Control/Status Register
- 5.0 Operational Characteristics
- 6.0 Package Information
- 7.0 Application Notes
- Appendix A: Data Sheet Revision History
- The Microchip Web Site
- Customer Change Notification Service
- Customer Support
- Product Identification System
- Worldwide Sales and Service

2016 Microchip Technology Inc. DS00002165B-page 15
LAN8720A/LAN8720AI
TABLE 3-1: 4B/5B CODE TABLE
CODE
GROUP
SYM
RECEIVER
INTERPRETATION
TRANSMITTER
INTERPRETATION
11110 0 0 0000 DATA 0 0000 DATA
01001 1 1 0001 — 1 0001 —
10100 2 2 0010 — 2 0010 —
10101 3 3 0011 — 3 0011 —
01010 4 4 0100 — 4 0100 —
01011 5 5 0101 — 5 0101 —
01110 6 6 0110 — 6 0110 —
01111 7 7 0111 — 7 0111 —
10010 8 8 1000 — 8 1000 —
10011 9 9 1001 — 9 1001 —
10110 A A 1010 — A 1010 —
10111 B B 1011 — B 1011 —
11010 C C 1100 — C 1100 —
11011 D D 1101 — D 1101 —
11100 E E 1110 — E 1110 —
11101 F F 1111 — F 1111 —
11111 I IDLE Sent after /T/R until TXEN
11000 J First nibble of SSD, translated to “0101”
following IDLE, else RXER
Sent for rising TXEN
10001 K Second nibble of SSD, translated to
“0101” following J, else RXER
Sent for rising TXEN
01101 T First nibble of ESD, causes de-assertion
of CRS if followed by /R/, else assertion
of RXER
Sent for falling TXEN
00111 R Second nibble of ESD, causes deasser-
tion of CRS if following /T/, else assertion
of RXER
Sent for falling TXEN
00100 H Transmit Error Symbol Sent for rising TXER
00110 V INVALID, RXER if during RXDV INVALID
11001 V INVALID, RXER if during RXDV INVALID
00000 V INVALID, RXER if during RXDV INVALID
00001 V INVALID, RXER if during RXDV INVALID
00010 V INVALID, RXER if during RXDV INVALID
00011 V INVALID, RXER if during RXDV INVALID