Datasheet
Table Of Contents
- Small Footprint RMII 10/100 Ethernet Transceiver with HP Auto-MDIX Support
- 1.0 Introduction
- 2.0 Pin Description and Configuration
- 3.0 Functional Description
- 3.1 Transceiver
- 3.2 Auto-negotiation
- 3.3 HP Auto-MDIX Support
- 3.4 MAC Interface
- 3.5 Serial Management Interface (SMI)
- 3.6 Interrupt Management
- 3.7 Configuration Straps
- 3.8 Miscellaneous Functions
- 3.9 Application Diagrams
- 4.0 Register Descriptions
- 4.1 Register Nomenclature
- 4.2 Control and Status Registers
- TABLE 4-2: SMI Register Map
- 4.2.1 Basic Control Register
- 4.2.2 Basic Status Register
- 4.2.3 PHY Identifier 1 Register
- 4.2.4 PHY Identifier 2 Register
- 4.2.5 Auto Negotiation Advertisement Register
- 4.2.6 Auto Negotiation Link Partner Ability Register
- 4.2.7 Auto Negotiation Expansion Register
- 4.2.8 Mode Control/Status Register
- 4.2.9 Special Modes Register
- 4.2.10 Symbol Error Counter Register
- 4.2.11 Special Control/Status Indications Register
- 4.2.12 Interrupt Source Flag Register
- 4.2.13 Interrupt Mask Register
- 4.2.14 PHY Special Control/Status Register
- 5.0 Operational Characteristics
- 6.0 Package Information
- 7.0 Application Notes
- Appendix A: Data Sheet Revision History
- The Microchip Web Site
- Customer Change Notification Service
- Customer Support
- Product Identification System
- Worldwide Sales and Service
TABLE 2-6: ANALOG REFERENCE PINS
Num PINs NAME SYMBOL
BUFFER
TYPE
DESCRIPTION
1 External 1%
Bias Resistor
Inpu
t
RBIAS AI This pin requires connection of a 12.1k ohm (1%)
resistor to ground.
Refer to the LAN8720A/LAN8720Ai reference
sch
ematic for connection information.
Note: The nominal voltage is 1.2V and the
resistor will dissipate approximately 1mW
of power.
TABLE 2-7: POWER PINS
Num PINs NAME SYMBOL
BUFFER
TYPE
DESCRIPTION
1 +1.6V to
+3.6V Vari-
able I/O
Power
VDDIO P +1.6V to +3.6V variable I/O power
Refer to the LAN8720A/LAN8720Ai reference
sch
ematic for connection information.
1 +1.2V Digital
Core Power
Supp
ly
VDDCR P Supplied by the on-chip regulator unless config-
ured for regulator off mode via the REGOFF con-
figuration strap.
Refer to the LAN8720A/LAN8720Ai reference
schematic for connection information.
Note: 1
uF and 470 pF decoupling capacitors in
parallel to ground should be used on this
pin.
1 +3.3V Chan-
nel 1 Analog
Port Power
VDD1A P +3.3V Analog Port Power to Channel 1
Refer to the LAN8720A/LAN8720Ai reference
sch
ematic for connection information.
1 +3.3V Chan-
nel 2 Analog
Port Power
VDD2A P +3.3V Analog Port Power to Channel 2 and the
i
nternal regulator.
Refer to the LAN8720A/LAN8720Ai reference
sch
ematic for connection information.
1 Ground VSS P Common ground. This exposed pad must be con-
nected to the ground plane with a via array.
2016 Microchip Technology Inc. DS00002165B-page 11
LAN8720A/LAN8720AI
2.1 Pin Assignments