Datasheet

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SMSC LAN8700/LAN8700i Revision 2.3 (04-12-11)

DATASHEET

Datasheet

PRODUCT FEATURES

LAN8700/LAN8700i

±15kV ESD Protected MII/RMII

10/100 Ethernet Transceiver with HP

Auto-MDIX Support and flexPWR

Technology in a Small Footprint

 Single-Chip Ethernet Physical Layer Transceiver

(PHY)

 ESD Protection levels of ±8kV HBM without external

protection devices

 ESD protection levels of EN/IEC61000-4-2, ±8kV

contact mode, and ±15kV for air discharge mode per

independent test facility

 Comprehensive flexPWR

Technology

— Flexible Power Management Architecture

 LVCMOS Variable I/O voltage range: +1.6V to +3.6V

 Integrated 3.3V to 1.8V regulator for optional single

supply operation.

— Regulator can be disabled if 1.8V system supply is

available.

 Performs HP Auto-MDIX in accordance with IEEE

802.3ab specification

 Cable length greater than 150 meters

 Automatic Polarity Correction

 Latch-Up Performance Exceeds 150mA per

EIA/JESD 78, Class II

 Energy Detect power-down mode

 Low Current consumption power down mode

 Low operating current consumption:

— 39mA typical in 10BASE-T and

— 79mA typical in 100BASE-TX mode

 Supports Auto-negotiation and Parallel Detection

 Supports the Media Independent Interface (MII) and

Reduced Media Independent Interface (RMII)

 Compliant with IEEE 802.3-2005 standards

— MII Pins tolerant to 3.6V

 IEEE 802.3-2005 compliant register functions

 Integrated DSP with Adaptive Equalizer

 Baseline Wander (BLW) Correction

 Vendor Specific register functions

 Low profile 36-pin QFN lead-free RoHS compliant

package (6 x 6 x 0.9mm height)

 4 LED status indicators

 Commercial Operating Temperature 0° C to 70° C

 Industrial Operating Temperature -40° C to 85° C

version available (LAN8700i)

Applications

 Set Top Boxes

 Network Printers and Servers

 LAN on Motherboard

 10/100 PCMCIA/CardBus Applications

 Embedded Telecom Applications

 Video Record/Playback Systems

 Cable Modems/Routers

 DSL Modems/Routers

 Digital Video Recorders

 Personal Video Recorders

 IP and Video Phones

 Wireless Access Points

 Digital Televisions

 Digital Media Adaptors/Servers

 POS Terminals

 Automotive Networking

 Gaming Consoles

 Security Systems

 POE Applications

 Access Control

Summary of content (83 pages)

PAGE 1
LAN8700/LAN8700i ±15kV ESD Protected MII/RMII 10/100 Ethernet Transceiver with HP Auto-MDIX Support and flexPWR® Technology in a Small Footprint PRODUCT FEATURES Datasheet Single-Chip Ethernet Physical Layer Transceiver (PHY) ESD Protection levels of ±8kV HBM without external protection devices ESD protection levels of EN/IEC61000-4-2, ±8kV contact mode, and ±15kV for air discharge mode per independent test facility Comprehensive flexPWR® Technology Applications — Flexible Power Managem
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±15kV ESD Protected MII/RMII 10/100 Ethernet Transceiver with HP Auto-MDIX Support and flexPWR® Technology in a Small Footprint Datasheet Order Numbers: LAN8700C-AEZG for 36-pin, QFN lead-free RoHS compliant package LAN8700iC-AEZG for (Industrial Temp) 36-pin, QFN lead-free RoHS compliant package 4900 pcs per tray LAN8700C-AEZG-TR for 36-pin, QFN lead-free RoHS compliant package (tape and reel) 3000 pcs per reel This product meets the halogen maximum concentration values per IEC61249-2-21 For RoHS comp
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±15kV ESD Protected MII/RMII 10/100 Ethernet Transceiver with HP Auto-MDIX Support and flexPWR® Technology in a Small Footprint Datasheet Table of Contents Chapter 1 General Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 1.1 Architectural Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Chapter 2 Pin Configuration . . . . . . . . . . . . . . . . . . . . . . . .
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±15kV ESD Protected MII/RMII 10/100 Ethernet Transceiver with HP Auto-MDIX Support and flexPWR® Technology in a Small Footprint Datasheet 4.10 4.11 4.12 4.13 nINT/TX_ER/TXD4 Strapping. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PHY Address Strapping and LED Output Polarity Selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Variable Voltage I/O . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
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±15kV ESD Protected MII/RMII 10/100 Ethernet Transceiver with HP Auto-MDIX Support and flexPWR® Technology in a Small Footprint Datasheet List of Figures Figure 1.1 Figure 1.2 Figure 2.1 Figure 4.1 Figure 4.2 Figure 4.3 Figure 4.4 Figure 4.5 Figure 4.6 Figure 4.7 Figure 5.1 Figure 5.2 Figure 5.3 Figure 5.4 Figure 6.1 Figure 6.2 Figure 6.3 Figure 6.4 Figure 6.5 Figure 6.6 Figure 6.7 Figure 6.8 Figure 6.9 Figure 6.10 Figure 8.1 Figure 9.1 Figure 9.2 Figure 9.3 LAN8700/LAN8700i System Block Diagram . . . .
PAGE 6
±15kV ESD Protected MII/RMII 10/100 Ethernet Transceiver with HP Auto-MDIX Support and flexPWR® Technology in a Small Footprint Datasheet List of Tables Table 2.1 LAN8700/LAN8700i 36-PIN QFN Pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Table 3.1 MII Signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Table 3.2 LED Signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
PAGE 7
±15kV ESD Protected MII/RMII 10/100 Ethernet Transceiver with HP Auto-MDIX Support and flexPWR® Technology in a Small Footprint Datasheet Table 5.41 Register 27 - Special Control/Status Indications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Table 5.42 Register 28 - Special Internal Testability Controls. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Table 5.43 Register 29 - Interrupt Source Flags . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
PAGE 8
±15kV ESD Protected MII/RMII 10/100 Ethernet Transceiver with HP Auto-MDIX Support and flexPWR® Technology in a Small Footprint Datasheet Chapter 1 General Description The SMSC LAN8700/LAN8700i is a low-power, industrial temperature (LAN8700i), variable I/O voltage, analog interface IC with HP Auto-MDIX support for high-performance embedded Ethernet applications. The LAN8700/LAN8700i can be configured to operate on a single 3.3V supply utilizing an integrated 3.3V to 1.8V linear regulator.
PAGE 9
±15kV ESD Protected MII/RMII 10/100 Ethernet Transceiver with HP Auto-MDIX Support and flexPWR® Technology in a Small Footprint Datasheet MODE0 MODE1 MODE2 MODE Control nRST SMI AutoNegotiation 10M Tx Logic HP Auto-MDIX 10M Transmitter TXP / TXN Transmit Section Management Control 100M Tx Logic MII RXP / RXN 100M Transmitter MDIX Control RXD[0..3] RX_DV RX_ER RX_CLK RMII / MII Logic TXD[0..
PAGE 10
±15kV ESD Protected MII/RMII 10/100 Ethernet Transceiver with HP Auto-MDIX Support and flexPWR® Technology in a Small Footprint Datasheet Chapter 2 Pin Configuration COL/RMII/CRS_DV VDDA3.3 EXRES1 VDDA3.3 RXP RXN VDDA3.
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±15kV ESD Protected MII/RMII 10/100 Ethernet Transceiver with HP Auto-MDIX Support and flexPWR® Technology in a Small Footprint Datasheet Table 2.1 LAN8700/LAN8700i 36-PIN QFN Pinout PIN NO. PIN NAME PIN NO.
PAGE 12
±15kV ESD Protected MII/RMII 10/100 Ethernet Transceiver with HP Auto-MDIX Support and flexPWR® Technology in a Small Footprint Datasheet Chapter 3 Pin Description This chapter describes the signals on each pin. When a lower case “n” is used at the beginning of the signal name, it indicates that the signal is active low. For example, nRST indicates that the reset signal is active low. 3.1 I/O Signals The following buffer types are shown in the TYPE column of the tables in this chapter. I Input.
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±15kV ESD Protected MII/RMII 10/100 Ethernet Transceiver with HP Auto-MDIX Support and flexPWR® Technology in a Small Footprint Datasheet Table 3.1 MII Signals (continued) SIGNAL NAME TYPE TX_CLK O RXD0/ MODE0 IOPU DESCRIPTION Transmit Clock: 25MHz in 100Base-TX mode. 2.5MHz in 10Base-T mode. Note: This signal is not used in RMII Mode. Note: For proper TXCLK operation, RX_ER and RX_DV must NOT be driven high externally on a hardware reset or on a LAN8700 power up.
PAGE 14
±15kV ESD Protected MII/RMII 10/100 Ethernet Transceiver with HP Auto-MDIX Support and flexPWR® Technology in a Small Footprint Datasheet Table 3.1 MII Signals (continued) SIGNAL NAME TYPE DESCRIPTION RX_ER/ RXD4/ OPD Receive Error: Asserted to indicate that an error was detected somewhere in the frame presently being transferred from the PHY. MII Receive Data 4: In Symbol Interface (5B Decoding) mode, this signal is the MII Receive Data 4 signal, the MSB of the received 5-bit symbol code-group.
PAGE 15
±15kV ESD Protected MII/RMII 10/100 Ethernet Transceiver with HP Auto-MDIX Support and flexPWR® Technology in a Small Footprint Datasheet Table 3.2 LED Signals SIGNAL NAME TYPE DESCRIPTION SPEED100/ PHYAD0 IOPU LED1 – SPEED100 indication. Active indicates that the selected speed is 100Mbps. Inactive indicates that the selected speed is 10Mbps. Note: LINK/ PHYAD1 IOPU This signal is mux’d with PHYAD0 LED2 – LINK ON indication. Active indicates that the Link (100Base-TX or 10Base-T) is on.
PAGE 16
±15kV ESD Protected MII/RMII 10/100 Ethernet Transceiver with HP Auto-MDIX Support and flexPWR® Technology in a Small Footprint Datasheet Table 3.4 Boot Strap Configuration Inputs (Note 3.1) (continued) SIGNAL NAME TYPE DESCRIPTION RXD1/ MODE1 IOPU PHY Operating Mode Bit 1: set the default MODE of the PHY. See Section 5.4.9.2, "Mode Bus – MODE[2:0]," on page 56, for the MODE options. Note: RXD0/ MODE0 IOPU This signal is mux’d with RXD1 PHY Operating Mode Bit 0: set the default MODE of the PHY.
PAGE 17
±15kV ESD Protected MII/RMII 10/100 Ethernet Transceiver with HP Auto-MDIX Support and flexPWR® Technology in a Small Footprint Datasheet Table 3.5 General Signals (continued) SIGNAL NAME TYPE DESCRIPTION CLKIN/ XTAL1 I/O Clock Input – 25 Mhz or 50 MHz external clock or crystal input. In MII mode, this signal is the 25 MHz reference input clock In RMII mode, this signal is the 50 MHz reference input clock which is typically also driven to the RMII compliant Ethernet MAC clock input.
PAGE 18
±15kV ESD Protected MII/RMII 10/100 Ethernet Transceiver with HP Auto-MDIX Support and flexPWR® Technology in a Small Footprint Datasheet Table 3.8 Power Signals (continued) SIGNAL NAME TYPE DESCRIPTION VDD_CORE POWER +1.8V (Core voltage) - 1.8V for digital circuitry on chip. Supplied by the on-chip regulator unless configured for regulator off mode using the RX_CLK/REGOFF pin. Place a 0.1uF capacitor near this pin and connect the capacitor from this pin to ground.
PAGE 19
±15kV ESD Protected MII/RMII 10/100 Ethernet Transceiver with HP Auto-MDIX Support and flexPWR® Technology in a Small Footprint Datasheet Chapter 4 Architecture Details 4.
PAGE 20
±15kV ESD Protected MII/RMII 10/100 Ethernet Transceiver with HP Auto-MDIX Support and flexPWR® Technology in a Small Footprint Datasheet The first 16 code-groups are referred to by the hexadecimal values of their corresponding data nibbles, 0 through F. The remaining code-groups are given letter designations with slashes on either side. For example, an IDLE code-group is /I/, a transmit error code-group is /H/, etc. The encoding process may be bypassed by clearing bit 6 of register 31.
PAGE 21
±15kV ESD Protected MII/RMII 10/100 Ethernet Transceiver with HP Auto-MDIX Support and flexPWR® Technology in a Small Footprint Datasheet Table 4.
PAGE 22
±15kV ESD Protected MII/RMII 10/100 Ethernet Transceiver with HP Auto-MDIX Support and flexPWR® Technology in a Small Footprint Datasheet 4.2.6 100M Phase Lock Loop (PLL) The 100M PLL locks onto reference clock and generates the 125MHz clock used to drive the 125 MHz logic and the 100Base-Tx Transmitter.
PAGE 23
±15kV ESD Protected MII/RMII 10/100 Ethernet Transceiver with HP Auto-MDIX Support and flexPWR® Technology in a Small Footprint Datasheet 4.3.3 NRZI and MLT-3 Decoding The DSP generates the MLT-3 recovered levels that are fed to the MLT-3 converter. The MLT-3 is then converted to an NRZI data stream. 4.3.4 Descrambling The descrambler performs an inverse function to the scrambler in the transmitter and also performs the Serial In Parallel Out (SIPO) conversion of the data.
PAGE 24
±15kV ESD Protected MII/RMII 10/100 Ethernet Transceiver with HP Auto-MDIX Support and flexPWR® Technology in a Small Footprint Datasheet CLEAR-TEXT J K 5 5 5 D data data data data T R 5 5 5 5 5 D data data data data Idle RX_CLK RX_DV RXD Figure 4.3 Relationship Between Received Data and Specific MII Signals 4.3.8 Receiver Errors During a frame, unexpected code-groups are considered receive errors.
PAGE 25
±15kV ESD Protected MII/RMII 10/100 Ethernet Transceiver with HP Auto-MDIX Support and flexPWR® Technology in a Small Footprint Datasheet In order to comply with legacy 10Base-T MAC/Controllers, in Half-duplex mode the PHY loops back the transmitted data, on the receive path. This does not confuse the MAC/Controller since the COL signal is not asserted during this time. The PHY also supports the SQE (Heartbeat) signal. See Section 5.4.2, "Collision Detect," on page 51, for more details.
PAGE 26
±15kV ESD Protected MII/RMII 10/100 Ethernet Transceiver with HP Auto-MDIX Support and flexPWR® Technology in a Small Footprint Datasheet The RX10M block also detects valid 10Base-T IDLE signals - Normal Link Pulses (NLPs) - to maintain the link. 4.5.3 10M Receive Data Across the MII/RMII Interface For MII, the 4 bit data nibbles are sent to the MII block. In MII mode, these data nibbles are valid on the rising edge of the 2.5 MHz RX_CLK. For RMII, the 2bit data nibbles are sent to the RMII block.
PAGE 27
±15kV ESD Protected MII/RMII 10/100 Ethernet Transceiver with HP Auto-MDIX Support and flexPWR® Technology in a Small Footprint Datasheet 4.6.2 RMII The SMSC LAN8700/LAN8700i supports the low pin count Reduced Media Independent Interface (RMII) intended for use between Ethernet PHYs and Switch ASICs. Under IEEE 802.3, an MII comprised of 16 pins for data and control is defined.
PAGE 28
±15kV ESD Protected MII/RMII 10/100 Ethernet Transceiver with HP Auto-MDIX Support and flexPWR® Technology in a Small Footprint Datasheet is asynchronous relative to REF_CLK, the data on RXD[1:0] shall be “00” until proper receive signal decoding takes place. 4.6.3 MII vs. RMII Configuration The LAN8700/LAN8700i must be configured to support the MII or RMII bus for connectivity to the MAC. This configuration is done through the COL/RMII/CRS_DV pin. To select MII mode, float the COL/RMII/CRS_DV pin.
PAGE 29
±15kV ESD Protected MII/RMII 10/100 Ethernet Transceiver with HP Auto-MDIX Support and flexPWR® Technology in a Small Footprint Datasheet 4.7 Auto-negotiation The purpose of the Auto-negotiation function is to automatically configure the PHY to the optimum link parameters based on the capabilities of its link partner.
PAGE 30
±15kV ESD Protected MII/RMII 10/100 Ethernet Transceiver with HP Auto-MDIX Support and flexPWR® Technology in a Small Footprint Datasheet If the full capabilities of the PHY are advertised (100M, Full Duplex), and if the link partner is capable of 10M and 100M, then auto-negotiation selects 100M as the highest performance mode. If the link partner is capable of Half and Full duplex modes, then auto-negotiation selects Full Duplex as the highest performance operation.
PAGE 31
±15kV ESD Protected MII/RMII 10/100 Ethernet Transceiver with HP Auto-MDIX Support and flexPWR® Technology in a Small Footprint Datasheet In Full Duplex mode, the PHY is able to transmit and receive data simultaneously. In this mode, CRS responds only to receive activity. The CSMA/CD protocol does not apply and collision detection is disabled. 4.
PAGE 32
±15kV ESD Protected MII/RMII 10/100 Ethernet Transceiver with HP Auto-MDIX Support and flexPWR® Technology in a Small Footprint Datasheet When the +1.8V internal regulator is disabled, a 0.1uF capacitor must be added at the VDD_CORE pin and placed close to the PHY to decouple the external power supply. 4.9.2 Enable the Internal +1.8V Regulator The 1.
PAGE 33
±15kV ESD Protected MII/RMII 10/100 Ethernet Transceiver with HP Auto-MDIX Support and flexPWR® Technology in a Small Footprint Datasheet Phy Address = 0 LED output = active high Phy Address = 1 LED output = active low VDD LED1-LED4 ~10K ohms ~270 ohms ~270 ohms LED1-LED4 Figure 4.5 PHY Address Strapping on LED’s 4.12 Variable Voltage I/O The Digital I/O pins on the LAN8700/LAN8700i are variable voltage to take advantage of low power savings from shrinking technologies.
PAGE 34
±15kV ESD Protected MII/RMII 10/100 Ethernet Transceiver with HP Auto-MDIX Support and flexPWR® Technology in a Small Footprint Datasheet 4.13.1 Serial Management Interface (SMI) The Serial Management Interface is used to control the LAN8700/LAN8700i and obtain its status. This interface supports registers 0 through 6 as required by Clause 22 of the 802.3 standard, as well as “vendor-specific” registers 16 to 31 allowed by the specification.
PAGE 35
Table 5.1 Control Register: Register 0 (Basic) 15 14 13 12 11 10 9 8 7 6 Reset Loopback Speed Select A/N Enable Power Down Isolate Restart A/N Duplex Mode Collision Test 5 4 3 2 1 0 Reserved Table 5.
PAGE 36
15 14 13 12 Next Page Acknowledge Remote Fault 11 Reserved 10 9 8 7 6 5 4 Pause 100BaseT4 100Base-TX Full Duplex 100BaseTX 10Base-T Full Duplex 10BaseT 3 2 1 0 IEEE 802.3 Selector Field Table 5.7 Auto-Negotiation Expansion Register: Register 6 (Extended) 15 14 13 12 11 10 9 8 7 6 5 Reserved 4 3 2 1 0 Parallel Detect Fault Link Partner Next Page Able Next Page Able Page Received Link Partner A/N Able 36 DATASHEET Table 5.
PAGE 37
14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 5 4 3 2 1 0 5 4 3 2 1 0 5 4 3 2 1 0 5 4 3 2 1 0 5 4 3 2 1 0 IEEE Reserved Table 5.10 Register 9 (Extended) 15 14 13 12 11 10 9 8 7 6 IEEE Reserved Table 5.11 Register 10 (Extended) 15 14 13 12 11 10 9 8 7 6 IEEE Reserved 37 DATASHEET Table 5.12 Register 11 (Extended) 15 14 13 12 11 10 9 8 7 6 IEEE Reserved Table 5.
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14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 5 4 3 2 1 0 4 3 2 1 0 IEEE Reserved Table 5.16 Register 15 (Extended) 15 14 13 12 11 10 9 8 7 6 IEEE Reserved Table 5.17 Silicon Revision Register 16: Vendor-Specific 15 14 13 12 11 10 9 8 Reserved 7 6 5 Silicon Revision Reserved 38 DATASHEET Table 5.
PAGE 39
14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 5 4 3 2 1 0 5 4 3 2 1 0 4 3 2 1 0 Reserved Table 5.21 Register 24: Vendor-Specific 15 14 13 12 11 10 9 8 7 6 Reserved Table 5.22 Register 25: Vendor-Specific 15 14 13 12 11 10 9 8 7 6 Reserved 39 DATASHEET Table 5.23 Symbol Error Counter Register 26: Vendor-Specific 15 14 13 12 11 10 9 8 7 6 5 Symbol Error Counter Table 5.
PAGE 40
14 13 12 11 10 9 8 Reserved 7 6 5 4 3 2 1 0 INT7 INT6 INT5 INT4 INT3 INT2 INT1 Reserved Table 5.27 Interrupt Mask Register 30: Vendor-Specific 15 14 13 12 11 10 9 8 7 6 5 Reserved 4 3 2 1 Mask Bits 0 Reserved Table 5.
PAGE 41
±15kV ESD Protected MII/RMII 10/100 Ethernet Transceiver with HP Auto-MDIX Support and flexPWR® Technology in a Small Footprint Datasheet 5.1 SMI Register Mapping The following registers are supported (register numbers are in decimal): Table 5.29 SMI Register Mapping REGISTER # 5.
PAGE 42
±15kV ESD Protected MII/RMII 10/100 Ethernet Transceiver with HP Auto-MDIX Support and flexPWR® Technology in a Small Footprint Datasheet Table 5.30 Register 0 - Basic Control ADDRESS NAME DESCRIPTION MODE DEFAULT 0.15 Reset 1 = software reset. Bit is self-clearing. For best results, when setting this bit do not set other bits in this register. The configuration (as described in Section 5.4.9.2) is set from the register bit values, and not from the mode pins. RW/ SC 0 0.
PAGE 43
±15kV ESD Protected MII/RMII 10/100 Ethernet Transceiver with HP Auto-MDIX Support and flexPWR® Technology in a Small Footprint Datasheet Table 5.31 Register 1 - Basic Status (continued) ADDRESS NAME DESCRIPTION 1.4 Remote Fault 1.3 Auto-Negotiate Ability 1.2 Link Status 1.1 Jabber Detect 1.
PAGE 44
±15kV ESD Protected MII/RMII 10/100 Ethernet Transceiver with HP Auto-MDIX Support and flexPWR® Technology in a Small Footprint Datasheet Table 5.34 Register 4 - Auto Negotiation Advertisement (continued) ADDRESS NAME 4.9 100Base-T4 4.8 100Base-TX Full Duplex 4.7 100Base-TX 4.6 10Base-T Full Duplex 4.5 4.4:0 DESCRIPTION MODE DEFAULT 1 = T4 able, 0 = no T4 ability This Phy does not support 100Base-T4.
PAGE 45
±15kV ESD Protected MII/RMII 10/100 Ethernet Transceiver with HP Auto-MDIX Support and flexPWR® Technology in a Small Footprint Datasheet Table 5.36 Register 6 - Auto Negotiation Expansion ADDRESS NAME 6.15:5 Reserved 6.4 Parallel Detection Fault 6.
PAGE 46
±15kV ESD Protected MII/RMII 10/100 Ethernet Transceiver with HP Auto-MDIX Support and flexPWR® Technology in a Small Footprint Datasheet Table 5.38 Register 17 - Mode Control/Status (continued) ADDRESS NAME 17.8:7 Reserved 17.6 ALTINT 17.5:4 DESCRIPTION MODE DEFAULT Write as 0, ignore on read. RW 00 Alternate Interrupt Mode. 0 = Primary interrupt system enabled (Default). 1 = Alternate interrupt system enabled. See Section 5.3, "Interrupt Management," on page 49.
PAGE 47
±15kV ESD Protected MII/RMII 10/100 Ethernet Transceiver with HP Auto-MDIX Support and flexPWR® Technology in a Small Footprint Datasheet Table 5.40 Register 26 - Symbol Error Counter ADDRESS NAME DESCRIPTION MODE DEFAULT 26.15:0 Sym_Err_Cnt 100Base-TX receiver-based error register that increments when an invalid code symbol is received including IDLE symbols. The counter is incremented only once per packet, even when the received packet contains more than one symbol error.
PAGE 48
±15kV ESD Protected MII/RMII 10/100 Ethernet Transceiver with HP Auto-MDIX Support and flexPWR® Technology in a Small Footprint Datasheet Table 5.43 Register 29 - Interrupt Source Flags (continued) ADDRESS NAME 29.6 INT6 29.5 DESCRIPTION MODE DEFAULT 1 = Auto-Negotiation complete 0 = not source of interrupt RO/ LH X INT5 1 = Remote Fault Detected 0 = not source of interrupt RO/ LH X 29.4 INT4 1 = Link Down (link status negated) 0 = not source of interrupt RO/ LH X 29.
PAGE 49
±15kV ESD Protected MII/RMII 10/100 Ethernet Transceiver with HP Auto-MDIX Support and flexPWR® Technology in a Small Footprint Datasheet Table 5.45 Register 31 - PHY Special Control/Status (continued) ADDRESS NAME 31.4:2 Speed Indication 31.1 31.0 5.
PAGE 50
±15kV ESD Protected MII/RMII 10/100 Ethernet Transceiver with HP Auto-MDIX Support and flexPWR® Technology in a Small Footprint Datasheet Table 5.46 Interrupt Management Table (continued) Mask Interrupt Source Flag Interrupt Source Event to Assert nINT Event to De-Assert nINT 30.5 29.5 Remote Fault Detected 1.4 Remote Fault Rising 1.4 Falling 1.4, or Reading register 1 or Reading register 29 30.4 29.4 Link Down 1.2 Link Status Falling 1.2 Reading register 1 or Reading register 29 30.
PAGE 51
±15kV ESD Protected MII/RMII 10/100 Ethernet Transceiver with HP Auto-MDIX Support and flexPWR® Technology in a Small Footprint Datasheet To de-assert the nINT interrupt output, either. 1. Clear the ENERGYON bit (17.1), by removing the cable, then writing a ‘1’ to register 29.7. Or 2. Clear the Mask bit 30.1 by writing a ‘0’ to 30.1. Table 5.47 Alternative Interrupt System Management Table Mask Interrupt Source Flag Interrupt Source Event to Assert nINT Condition to De-Assert. Bit to Clear nINT 30.
PAGE 52
±15kV ESD Protected MII/RMII 10/100 Ethernet Transceiver with HP Auto-MDIX Support and flexPWR® Technology in a Small Footprint Datasheet 5.4.3 Isolate Mode The PHY data paths may be electrically isolated from the MII by setting register 0, bit 10 to a logic one. In isolation mode, the PHY does not respond to the TXD, TX_EN and TX_ER inputs. The PHY still responds to management transactions. Isolation provides a means for multiple PHYs to be connected to the same MII without contention occurring.
PAGE 53
±15kV ESD Protected MII/RMII 10/100 Ethernet Transceiver with HP Auto-MDIX Support and flexPWR® Technology in a Small Footprint Datasheet 5.4.6 Reset The PHY has 3 reset sources: Hardware reset (HWRST): connected to the nRST input. At power up, nRST must not go high until after the VDDIO and VDD_CORE supplies are stable, as shown in Figure 5.1. To initiate a hardware reset, nRST must be held LOW for at least 100 us to ensure that the Phy is properly reset, as shown in Figure 6.10.
PAGE 54
±15kV ESD Protected MII/RMII 10/100 Ethernet Transceiver with HP Auto-MDIX Support and flexPWR® Technology in a Small Footprint Datasheet 5.4.7 LED Description The PHY provides four LED signals. These provide a convenient means to determine the mode of operation of the Phy. All LED signals are either active high or active low. The four LED signals can be either active-high or active-low. Polarity depends upon the Phy address latched in on reset.
PAGE 55
±15kV ESD Protected MII/RMII 10/100 Ethernet Transceiver with HP Auto-MDIX Support and flexPWR® Technology in a Small Footprint Datasheet 5.4.8.2 Far Loopback Far loopback is a special test mode for MDI (analog) loopback as indicated by the blue arrows in Figure 5.3. The far loopback mode is enabled by setting bit register 17 bit 9 to logic one. In this mode, data that is received from the link partner on the MDI is looped back out to the link partner.
PAGE 56
±15kV ESD Protected MII/RMII 10/100 Ethernet Transceiver with HP Auto-MDIX Support and flexPWR® Technology in a Small Footprint Datasheet 5.4.9 Configuration Signals The PHY has 11 configuration signals whose inputs should be driven continuously, either by external logic or external pull-up/pull-down resistors. 5.4.9.1 Physical Address Bus - PHYAD[4:0] The PHYAD[4:0] signals are driven high or low to give each PHY a unique address.
PAGE 57
±15kV ESD Protected MII/RMII 10/100 Ethernet Transceiver with HP Auto-MDIX Support and flexPWR® Technology in a Small Footprint Datasheet Chapter 6 AC Electrical Characteristics The timing diagrams and limits in this section define the requirements placed on the external signals of the Phy. 6.1 Serial Management Interface (SMI) Timing The Serial Management Interface is used for status and control as described in Section 4.13. T1.1 Clock MDC T1.2 Valid Data (Read from PHY) Data Out MDIO T1.
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±15kV ESD Protected MII/RMII 10/100 Ethernet Transceiver with HP Auto-MDIX Support and flexPWR® Technology in a Small Footprint Datasheet 6.2 MII 10/100Base-TX/RX Timings 6.2.1 MII 100Base-T TX/RX Timings 6.2.1.1 100M MII Receive Timing Clock Out RX_CLK T2.1 Data Out RXD[3:0] RX_DV RX_ER T2.2 Valid Data Figure 6.2 100M MII Receive Timing Diagram Table 6.2 100M MII Receive Timing Values PARAMETER DESCRIPTION MIN T2.1 Receive signals setup to RX_CLK rising 10 ns T2.
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±15kV ESD Protected MII/RMII 10/100 Ethernet Transceiver with HP Auto-MDIX Support and flexPWR® Technology in a Small Footprint Datasheet 6.2.1.2 100M MII Transmit Timing Clock Out TX_CLK T3.1 Data Out TXD[3:0] TX_EN TX_ER Valid Data Figure 6.3 100M MII Transmit Timing Diagram Table 6.3 100M MII Transmit Timing Values PARAMETER DESCRIPTION MIN TYP MAX UNITS T3.
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±15kV ESD Protected MII/RMII 10/100 Ethernet Transceiver with HP Auto-MDIX Support and flexPWR® Technology in a Small Footprint Datasheet 6.2.2 MII 10Base-T TX/RX Timings 6.2.2.1 10M MII Receive Timing Clock Out RX_CLK T4.1 Data Out RXD[3:0] RX_DV T4.2 Valid Data Figure 6.4 10M MII Receive Timing Diagram Table 6.4 10M MII Receive Timing Values PARAMETER DESCRIPTION MIN TYP MAX UNITS T4.1 Receive signals setup to RX_CLK rising 10 ns T4.
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±15kV ESD Protected MII/RMII 10/100 Ethernet Transceiver with HP Auto-MDIX Support and flexPWR® Technology in a Small Footprint Datasheet 6.2.2.2 10M MII Transmit Timing Clock Out TX_CLK T5.1 Data Out TXD[3:0] TX_EN Valid Data Figure 6.5 10M MII Transmit Timing Diagrams Table 6.5 10M MII Transmit Timing Values PARAMETER DESCRIPTION MIN TYP MAX UNITS T5.1 Transmit signals required setup to TX_CLK rising 12 ns Transmit signals required hold after TX_CLK rising 0 ns TX_CLK frequency 2.
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±15kV ESD Protected MII/RMII 10/100 Ethernet Transceiver with HP Auto-MDIX Support and flexPWR® Technology in a Small Footprint Datasheet 6.3 RMII 10/100Base-TX/RX Timings 6.3.1 RMII 100Base-T TX/RX Timings 6.3.1.1 100M RMII Receive Timing Clock In CLKIN T6.1 Data Out RXD[1:0] CRS_DV Valid Data Figure 6.6 100M RMII Receive Timing Diagram Table 6.6 100M RMII Receive Timing Values PARAMETER DESCRIPTION MIN T6.
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±15kV ESD Protected MII/RMII 10/100 Ethernet Transceiver with HP Auto-MDIX Support and flexPWR® Technology in a Small Footprint Datasheet 6.3.1.2 100M RMII Transmit Timing Clock In CLKIN T8.1 Data Out TXD[1:0] TX_EN T8.2 Valid Data Figure 6.7 100M RMII Transmit Timing Diagram Table 6.7 100M RMII Transmit Timing Values PARAMETER DESCRIPTION MIN T8.1 Transmit signals required setup to rising edge of CLKIN 2 ns T8.2 Transmit signals required hold after rising edge of REF_CLK 1.
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±15kV ESD Protected MII/RMII 10/100 Ethernet Transceiver with HP Auto-MDIX Support and flexPWR® Technology in a Small Footprint Datasheet 6.3.2 RMII 10Base-T TX/RX Timings 6.3.2.1 10M RMII Receive Timing Clock In CLKIN T9.1 Data Out RXD[1:0] CRS_DV Valid Data Figure 6.8 10M RMII Receive Timing Diagram Table 6.8 10M RMII Receive Timing Values PARAMETER DESCRIPTION MIN T9.1 Output delay from rising edge of CLKIN to receive signals output valid 2 TYP CLKIN frequency Revision 2.
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±15kV ESD Protected MII/RMII 10/100 Ethernet Transceiver with HP Auto-MDIX Support and flexPWR® Technology in a Small Footprint Datasheet 6.3.2.2 10M RMII Transmit Timing Clock In CLKIN T 10.2 T 10.1 Data Out TXD[1:0] TX_EN Valid Data Figure 6.9 10M RMII Transmit Timing Diagram Table 6.9 10M RMII Transmit Timing Values PARAMETER DESCRIPTION MIN TYP T10.1 Transmit signals required setup to rising edge of CLKIN 4 ns T10.
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±15kV ESD Protected MII/RMII 10/100 Ethernet Transceiver with HP Auto-MDIX Support and flexPWR® Technology in a Small Footprint Datasheet 6.4 RMII CLKIN Timing Table 6.10 RMII CLKIN (REF_CLK)Timing Values PARAMETER DESCRIPTION MIN TYP CLKIN frequency 50 CLKIN Frequency Drift CLKIN Duty Cycle UNITS NOTES MHz ± 50 ppm 60 % 150 psec p-p – not RMS UNITS NOTES 40 CLKIN Jitter 6.5 MAX Reset Timing T 11.1 nRST T 11.2 T 11.3 Configuration Signals T 11.4 O utput drive Figure 6.
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±15kV ESD Protected MII/RMII 10/100 Ethernet Transceiver with HP Auto-MDIX Support and flexPWR® Technology in a Small Footprint Datasheet 6.6 Clock Circuit LAN8700/LAN8700i can accept either a 25MHz crystal or a 25MHz single-ended clock oscillator (±50ppm) input for operation in MII mode. If the single-ended clock oscillator method is implemented, XTAL2 should be left unconnected and XTAL1/CLKIN should be driven with a nominal 0-3.3V clock signal.
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±15kV ESD Protected MII/RMII 10/100 Ethernet Transceiver with HP Auto-MDIX Support and flexPWR® Technology in a Small Footprint Datasheet Chapter 7 DC Electrical Characteristics 7.1 DC Characteristics 7.1.1 Maximum Guaranteed Ratings Stresses beyond those listed in may cause permanent damage to the device. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Table 7.1 Maximum Conditions PARAMETER CONDITIONS MIN VDD33,VDDIO Power pins to all other pins.
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±15kV ESD Protected MII/RMII 10/100 Ethernet Transceiver with HP Auto-MDIX Support and flexPWR® Technology in a Small Footprint Datasheet 7.1.1.2 IEN/IEC61000-4-2 Performance The EN/IEC61000-4-2 ESD specification is an international standard that addresses system-level immunity to ESD strikes while the end equipment is operational. In contrast, the HBM ESD tests are performed at the device level with the device powered down.
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±15kV ESD Protected MII/RMII 10/100 Ethernet Transceiver with HP Auto-MDIX Support and flexPWR® Technology in a Small Footprint Datasheet Table 7.4 Power Consumption Device Only VDDA3.3 POWER PINS(MA) VDD_CORE POWER PIN(MA) VDDIO POWER PIN(MA) TOTAL CURRENT (MA) TOTAL POWER (MW) Max 35.6 41.3 4.7 81.6 269.28 Typical 33.3 37.4 4.1 74.8 246.84 Min 31.3 33.4 1.3 66 165.75 Note 7.1 Max 15.6 22.3 1.1 39 128.7 Typical 15.3 20.8 0.9 37 122.1 Min 14.9 19.1 0.1 34.1 83.
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±15kV ESD Protected MII/RMII 10/100 Ethernet Transceiver with HP Auto-MDIX Support and flexPWR® Technology in a Small Footprint Datasheet 7.1.4 DC Characteristics - Input and Output Buffers Table 7.5 MII Bus Interface Signals NAME VIH (V) VIL (V) TXD0 0.68 * VDDIO 0.4 * VDDIO TXD1 0.68 * VDDIO 0.4 * VDDIO TXD2 0.68 * VDDIO 0.4 * VDDIO TXD3 0.68 * VDDIO 0.4 * VDDIO TX_EN 0.68 * VDDIO 0.4 * VDDIO IOH IOL VOL (V) VOH (V) TX_CLK -8 mA +8 mA +0.4 VDDIO – +0.
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±15kV ESD Protected MII/RMII 10/100 Ethernet Transceiver with HP Auto-MDIX Support and flexPWR® Technology in a Small Footprint Datasheet Table 7.6 LAN Interface Signals NAME VIH VIL IOH IOL VOL VOH TXP TXN RXP See Table 7.12, “100Base-TX Transceiver Characteristics,” on page 74 and Table 7.13, “10BASE-T Transceiver Characteristics,” on page 74. RXN Table 7.7 LED Signals NAME VIH (V) VIL (V) IOH IOL VOL (V) VOH (V) SPEED100/PHYAD0 0.68 * VDDIO 0.4 * VDDIO -12 mA +12 mA +0.
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±15kV ESD Protected MII/RMII 10/100 Ethernet Transceiver with HP Auto-MDIX Support and flexPWR® Technology in a Small Footprint Datasheet Table 7.9 General Signals NAME VIH (V) VIL (V) nINT/TX_ER/TXD4 nRST 0.68 * VDDIO 0.4 * VDDIO CLKIN/XTAL1 (Note 7.3) +1.40 V 0.4 * VDDIO XTAL2 - - IOH IOL VOL (V) VOH (V) -8 mA +8 mA +0.4 VDDIO – +0.4 NC Note 7.3 These levels apply when a 0-3.3V Clock is driven into CLKIN/XTAL1 and XTAL2 is floating. The maximum input voltage on XTAL1 is VDDIO + 0.
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±15kV ESD Protected MII/RMII 10/100 Ethernet Transceiver with HP Auto-MDIX Support and flexPWR® Technology in a Small Footprint Datasheet Note: For VDDIO operation below +2.5V, SMSC recommends designs add external strapping resistors in addition the internal strapping resistors to ensure proper strapped operation. Table 7.12 100Base-TX Transceiver Characteristics PARAMETER SYMBOL MIN TYP MAX UNITS NOTES Peak Differential Output Voltage High VPPH 950 - 1050 mVpk Note 7.
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±15kV ESD Protected MII/RMII 10/100 Ethernet Transceiver with HP Auto-MDIX Support and flexPWR® Technology in a Small Footprint Datasheet Chapter 8 Application Notes 8.1 Application Diagram MII/RMII VDD3.3 4.7uF 0.1uF MAC (Media Access Controller) VDD3.3 Voltage Regulator Host System 12.4k 1% RXP RXN VDDA3.3 TXP TXN 31 30 29 28 1 2 3 4 5 6 7 8 32 EXRES1 34 VDDA3.3 VDDA3.3 35 33 COL/RMII/CRS_DV 0.1uF 0.1uF 0.
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±15kV ESD Protected MII/RMII 10/100 Ethernet Transceiver with HP Auto-MDIX Support and flexPWR® Technology in a Small Footprint Datasheet 8.2 Magnetics Selection For a list of magnetics selected to operate with the SMSC LAN8700, please refer to the Application note “AN 8-13 Suggested Magnetics”. http://www.smsc.com/main/appnotes.html#Ethernet%20Products 8.3 Application Notes Application examples are given in pdf format on the SMSC LAN8700 web site. The link to the web site is shown below. http://www.
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±15kV ESD Protected MII/RMII 10/100 Ethernet Transceiver with HP Auto-MDIX Support and flexPWR® Technology in a Small Footprint Datasheet Includes 25MHz Crystal for Internal PHY Reference; RX_CLK is Supplied to the 40-Pin Connector Supports user configuration options including PHY address selection Integrated 3.3V Regulator APPLICATIONS The EVB8700 Evaluation board simplifies the process of testing and evaluating an Ethernet Connection in your application.
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±15kV ESD Protected MII/RMII 10/100 Ethernet Transceiver with HP Auto-MDIX Support and flexPWR® Technology in a Small Footprint Datasheet Chapter 9 Package Outline, Tape and Reel Figure 9.1 36-Pin QFN Package Outline, 6 x 6 x 0.90 mm Body (Lead-Free) Table 9.1 36-Pin QFN Package Parameters A A1 A2 A3 D D1 D2 E E1 E2 L e b ccc MIN NOMINAL MAX REMARKS 0.80 0 0.60 ~ ~ ~ 0.20 REF ~ ~ ~ ~ ~ ~ ~ 0.50 Basic ~ ~ 1.00 0.05 0.
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±15kV ESD Protected MII/RMII 10/100 Ethernet Transceiver with HP Auto-MDIX Support and flexPWR® Technology in a Small Footprint Datasheet Figure 9.2 QFN, 6x6 Tape & Reel SMSC LAN8700/LAN8700i 79 DATASHEET Revision 2.
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±15kV ESD Protected MII/RMII 10/100 Ethernet Transceiver with HP Auto-MDIX Support and flexPWR® Technology in a Small Footprint Datasheet Figure 9.3 Reel Dimensions Note: Standard reel size is 3000 pieces per reel. Revision 2.
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±15kV ESD Protected MII/RMII 10/100 Ethernet Transceiver with HP Auto-MDIX Support and flexPWR® Technology in a Small Footprint Datasheet Chapter 10 Datasheet Revision History Table 10.1 Customer Revision History REVISION LEVEL & DATE Rev. 2.3 (04-12-11) SECTION/FIGURE/ENTRY CORRECTION Section 6.5, "Reset Timing," on page 66 Corrected T11.4 minimum value to 3ns. Corrected T11.3 to 2ns. Table 5.
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±15kV ESD Protected MII/RMII 10/100 Ethernet Transceiver with HP Auto-MDIX Support and flexPWR® Technology in a Small Footprint Datasheet Table 10.1 Customer Revision History (continued) REVISION LEVEL & DATE SECTION/FIGURE/ENTRY CORRECTION Rev. 1.9 (03-18-08) Figure 6.3, "100M MII Transmit Timing Diagram" Replaced figure. Rev. 1.9 (03-18-08) Table 6.11, "Reset Timing Values" Changed the MIN value for T11.3: From: “400” To: “10” Rev. 1.9 (03-18-08) Table 6.
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±15kV ESD Protected MII/RMII 10/100 Ethernet Transceiver with HP Auto-MDIX Support and flexPWR® Technology in a Small Footprint Datasheet Table 10.1 Customer Revision History (continued) REVISION LEVEL & DATE SECTION/FIGURE/ENTRY CORRECTION Rev. 1.2 (05-23-07) Table 7.11 Added RX_DV to table. Rev. 1.2 (05-23-07) Table 3.1 Added note that RX_DV and RX_ER cannot be high during reset. Rev. 1.2 (05-23-07) Table 6.7 Moved parameter T8.2 from MAX column to MIN column. Rev. 1.1 (04-17-07) Table 7.