Datasheet

High Performance Single Chip Low Power 10/100 Ethernet Physical Layer Transceiver (PHY)
Datasheet
SMSC LAN83C185 59 Revision 0.8 (06-12-08)
DATASHEET
Note 6.1 Measured at the line side of the transformer, line replaced by 100Ω (+/- 1%) resistor.
Note 6.2 Offset from16 nS pulse width at 50% of pulse peak
Note 6.3 Measured differentially.
Note 6.4 Min/max voltages guaranteed as measured with 100Ω resistive load.
16 SPEED100 Pull-up 30 uA
17 LINKON Pull-up 30 uA
19 ACTIVITY Pull-up 30 uA
20 FDUPLEX Pull-up 30 uA
46 nINT Pull-up 30 uA
Table 6.10 100Base-TX Transceiver Characteristics
PARAMETER SYMBOL MIN TYP MAX UNITS NOTES
Peak Differential Output Voltage High V
PPH
950 - 1050 mVpk Note 6.1
Peak Differential Output Voltage Low V
PPL
-950 - -1050 mVpk Note 6.1
Signal Amplitude Symmetry V
SS
98 - 102 % Note 6.1
Signal Rise & Fall Time T
RF
3.0 - 5.0 nS Note 6.1
Rise & Fall Time Symmetry T
RFS
--0.5nSNote 6.1
Duty Cycle Distortion D
CD
35 50 65 % Note 6.2
Overshoot & Undershoot V
OS
--5%
Jitter 1.4 nS Note 6.3
Table 6.11 10BASE-T Transceiver Characteristics
PARAMETER SYMBOL MIN TYP MAX UNITS NOTES
Transmitter Peak Differential Output Voltage V
OUT
2.2 2.5 2.8 V Note 6.4
Receiver Differential Squelch Threshold V
DS
300 420 585 mV
Table 6.9 Internal Pull-Up / Pull-/Down Configurations (continued)
PIN NO. NAME PULL-UP OR PULL-DOWN TYPE