Datasheet

High Performance Single Chip Low Power 10/100 Ethernet Physical Layer Transceiver (PHY)
Datasheet
SMSC LAN83C185 57 Revision 0.8 (06-12-08)
DATASHEET
Table 6.4 LAN Interface Signals
PIN NO. NAME V
IH
V
IL
I
OH
I
OL
V
OL
V
OH
51 TXP
See Table 6.10, “100Base-TX Transceiver Characteristics,” on page 59 and
Table 6.11, “10BASE-T Transceiver Characteristics,” on page 59.
50 TXN
55 RXP
54 RXN
Table 6.5 LED Signals
PIN NO. NAME V
IH
V
IL
I
OH
I
OL
V
OL
V
OH
16 SPEED100 +2.0 V +0.8 V -12 mA +24 mA +0.4 V VDD –
+0.4 V
17 LINKON +2.0 V +0.8 V -12 mA +24 mA +0.4 V VDD –
+0.4 V
19 ACTIVITY +2.0 V +0.8 V -12 mA +24 mA +0.4 V VDD –
+0.4 V
20 FDUPLEX +2.0 V +0.8 V -12 mA +24 mA +0.4 V VDD –
+0.4 V
Table 6.6 Configuration Inputs
PIN NO. NAME V
IH
V
IL
I
OH
I
OL
V
OL
V
OH
16 PHYAD0 +2.0 V +0.8 V -12 mA +24 mA +0.4 V VDD –
+0.4 V
17 PHYAD1 +2.0 V +0.8 V -12 mA +24 mA +0.4 V VDD –
+0.4 V
19 PHYAD2 +2.0 V +0.8 V -12 mA +24 mA +0.4 V VDD –
+0.4 V
20 PHYAD3 +2.0 V +0.8 V -12 mA +24 mA +0.4 V VDD –
+0.4 V
2 PHYAD4 -4 mA +8 mA +0.4 V VDD –
+0.4 V
4 MODE0 +2.0 V +0.8 V
5 MODE1 +2.0 V +0.8 V
6 MODE2 +2.0 V +0.8 V
9 TEST0 +2.0 V +0.8 V
10 TEST1 +2.0 V +0.8 V
11 CLK_FREQ +2.0 V +0.8 V