Datasheet

High Performance Single Chip Low Power 10/100 Ethernet Physical Layer Transceiver (PHY)
Datasheet
SMSC LAN83C185 15 Revision 0.8 (06-12-08)
DATASHEET
60 AVSS4 Power Analog Ground
62 AVSS5 Power Analog Ground
13 VREG Power +3.3V Internal Regulator Input Voltage
14 VDD_CORE Power +1.8V Ring (Core voltage) - required for capacitance
connection.
8 VDD1 Power +3.3V Digital Power
18 VDD2 Power +3.3V Digital Power
43 VDD3 Power +3.3V Digital Power
7 VSS1 Power Digital Ground (GND)
15 VSS2 Power Digital Ground (GND)
21 VSS3 Power Digital Ground (GND)
24 VSS4 Power Digital Ground (GND)
28 VSS5 Power Digital Ground (GND)
36 VSS6 Power Digital Ground (GND)
40 VSS7 Power Digital Ground (GND)
Table 3.9 Power Signals (continued)
PIN NO. SIGNAL NAME TYPE DESCRIPTION