Datasheet

High Performance Single Chip Low Power 10/100 Ethernet Physical Layer Transceiver (PHY)
Datasheet
Revision 0.8 (06-12-08) 10 SMSC LAN83C185
DATASHEET
Table 2.1 LAN83C185 64-PIN TQFP Pinout
PIN NO. PIN NAME PIN NO. PIN NAME
1 GPO0/MII 33 RX_DV
2 GPO1/PHYAD4 34 RX_CLK
3 GPO2 35 RX_ER/RXD4
4 MODE0 36 VSS6
5 MODE1 37 TX_ER/TXD4
6 MODE2 38 TX_CLK
7 VSS1 39 TX_EN
8 VDD1 40 VSS7
9 TEST0 41 TXD0
10 TEST1 42 TXD1
11 CLK_FREQ 43 VDD3
12 REG_EN 44 TXD2
13 VREG 45 TXD3
14 VDD_CORE 46 nINT
15 VSS2 47 COL
16 SPEED100/PHYAD0 48 CRS
17 LINKON/PHYAD1 49 AVSS1
18 VDD2 50 TXN
19 ACTIVITY/PHYAD2 51 TXP
20 FDUPLEX/PHYAD3 52 AVSS2
21 VSS3 53 AVDD1
22 XTAL2 54 RXN
23 CLKIN/XTAL1 55 RXP
24 VSS4 56 NC2
25 nRST 57 AVDD2
26 MDIO 58 AVSS3
27 MDC 59 EXRES1
28 VSS5 60 AVSS4
29 RXD3 61 AVDD3
30 RXD2 62 AVSS5
31 RXD1 63 AVDD4
32 RXD0 64 NC1