Datasheet

Hi-Speed USB 2.0 to 10/100/1000 Ethernet Controller
Datasheet
Revision 1.0 (11-01-10) 52 SMSC LAN7500/LAN7500i
DATASHEET
7.5.6 JTAG Timing
This section specifies the JTAG timing of the device. Please refer to Section 1.1.10, "TAP Controller,"
on page 9 for additional details.
Figure 7.6 JTAG Timing
Table 7.19 JTAG Timing Values
SYMBOL DESCRIPTION MIN MAX UNITS NOTES
t
tckp
TCK clock period 66.67 ns
t
tckhl
TCK clock high/low time t
tckp
*0.4 t
tckp
*0.6 ns
t
su
TDI, TMS setup to TCK rising edge 10 ns
t
h
TDI, TMS hold from TCK rising edge 10 ns
t
dov
TDO output valid from TCK falling edge 16 ns
t
doinvld
TDO output invalid from TCK falling edge 0 ns
TCK (Input)
TDI, TMS (Inputs)
t
tckhl
t
tckp
t
tckhl
t
su
t
h
t
dov
TDO (Output)
t
doinvld