Datasheet

Hi-Speed USB 2.0 to 10/100/1000 Ethernet Controller
Datasheet
SMSC LAN7500/LAN7500i 49 Revision 1.0 (11-01-10)
DATASHEET
7.5.3 Power-On Reset Timing
Figure 7.3 illustrates the nRESET timing requirements in relation to power-on. A hardware reset
(nRESET assertion) is required following power-on. For proper operation, nRESET must be asserted
for no less than t
rstia
. The nRESET pin can be asserted at any time, but must not be deasserted before
t
purstd
after all external power supplies have reached operational levels.
Note: nRESET deassertion must be monotonic.
Figure 7.3 nRESET Power-On Timing
Table 7.16 nRESET Power-On Timing Values
SYMBOL DESCRIPTION MIN TYP MAX UNITS
t
purstd
External power supplies at operational level to nRESET
deassertion
25 mS
t
purstv
External power supplies at at operational level to
nRESET valid
0nS
t
rstia
nRESET input assertion time 100 μS
nRESET
t
rstia
All External
Power Supplies
t
purstd
V
opp
t
purstv