Datasheet
Table Of Contents
- 1.0 Introduction
- 2.0 Pin Description and Configuration
- 3.0 Functional Description
- 3.1 10BASE-T/100BASE-TX Transceiver
- 3.2 RMII Interface
- 3.3 Back-to-Back Mode – 100 Mbps Copper Repeater
- 3.4 MII Management (MIIM) Interface
- 3.5 Interrupt (INTRP)
- 3.6 HP Auto MDI/MDI-X
- 3.7 Loopback Mode
- 3.8 LinkMD® Cable Diagnostic
- 3.9 NAND Tree Support
- 3.10 Power Management
- 3.11 Reference Circuit for Power and Ground Connections
- 3.12 Typical Current/Power Consumption
- 4.0 Register Descriptions
- 5.0 Operational Characteristics
- 6.0 Electrical Characteristics
- 7.0 Timing Diagrams
- 8.0 Reset Circuit
- 9.0 Reference Circuits — LED Strap-In Pins
- 10.0 Reference Clock - Connection and Selection
- 11.0 Magnetic - Connection and Selection
- 12.0 Package Outline
KSZ8081RNA/RND
DS00002199A-page 30 2016 Microchip Technology Inc.
7.10:0 Message
Field
11-bit wide field to encode 2048 messages RW 000_0000_0001
Register 8h - Link Partner Next Page Ability
8.15 Next Page 1 = Additional next pages will follow
0 = Last page
RO 0
8.14 Acknowledge 1 = Successful receipt of link word
0 = No successful receipt of link word
RO 0
8.13 Message
Page
1 = Message page
0 = Unformatted page
RO 0
8.12 Acknowl-
edge2
1 = Can act on the information
0 = Cannot act on the information
RO 0
8.11 Toggle 1 = Previous value of transmitted link code word
equal to logic 0
0 = Previous value of transmitted link code word
equal to logic 1
RO 0
8.10:0 Message
Field
11-bit wide field to encode 2048 messages RO 000_0000_0000
Register 10h – Digital Reserved Control
10.15:5 Reserved Reserved RW 0000_0000_000
10.4 PLL Off 1 = Turn PLL off automatically in EDPD mode
0 = Keep PLL on in EDPD mode.
See also Register 18h, Bit [11] for EDPD mode
RW 0
10.3:0 Reserved Reserved RW 0000
Register 11h – AFE Control 1
11.15:6 Reserved Reserved RW 0000_0000_00
11.5 Slow-Oscilla-
tor Mode
Enable
Slow-oscillator mode is used to disconnect the
input reference crystal/clock on the XI pin and
select the on-chip slow oscillator when the
KSZ8081RNA/RND device is not in use after
power-up.
1 = Enable
0 = Disable
This bit automatically sets software power-down to
the analog side when enabled.
RW 0
11.4:0 Reserved Reserved RW 0_0000
Register 15h – RXER Counter
15.15:0 RXER
Counter
Receive error counter for symbol error frames RO/SC 0000h
Register 16h – Operation Mode Strap Override
16.15 Reserved
Factory
Mode
0 = Normal operation
1 = Factory test mode
If RXER (Pin 17) latches in a pull-up value at the
de-assertion of reset, write a ‘0’ to this bit to clear
Reserved Factory Mode.
RW 0
Set by the pull-up /
pull-down value of
RXER (Pin 17).
16.14:11 Reserved Reserved RW 000_0
16.10 Reserved Reserved RO 0
16.9 B-
CAST_OFF
Override
1 = Override strap-in for B-CAST_OFF
If bit is ‘1’, PHY Address 0 is non-broadcast.
RW 0
TABLE 4-2: REGISTER DESCRIPTIONS (CONTINUED)
Address Name Description
Mode
Note 4-1
Default