Datasheet
Table Of Contents
- 1.0 Introduction
- 2.0 Pin Description and Configuration
- 3.0 Functional Description
- 3.1 10BASE-T/100BASE-TX Transceiver
- 3.2 RMII Interface
- 3.3 Back-to-Back Mode – 100 Mbps Copper Repeater
- 3.4 MII Management (MIIM) Interface
- 3.5 Interrupt (INTRP)
- 3.6 HP Auto MDI/MDI-X
- 3.7 Loopback Mode
- 3.8 LinkMD® Cable Diagnostic
- 3.9 NAND Tree Support
- 3.10 Power Management
- 3.11 Reference Circuit for Power and Ground Connections
- 3.12 Typical Current/Power Consumption
- 4.0 Register Descriptions
- 5.0 Operational Characteristics
- 6.0 Electrical Characteristics
- 7.0 Timing Diagrams
- 8.0 Reset Circuit
- 9.0 Reference Circuits — LED Strap-In Pins
- 10.0 Reference Clock - Connection and Selection
- 11.0 Magnetic - Connection and Selection
- 12.0 Package Outline
KSZ8081RNA/RND
DS00002199A-page 28 2016 Microchip Technology Inc.
1.0 Extended
Capability
1 = Supports extended capability registers RO 1
Register 2h - PHY Identifier 1
2.15:0 PHY ID
Number
Assigned to the 3rd through 18th bits of the Organi-
zationally Unique Identifier (OUI). KENDIN Com-
munication’s OUI is 0010A1 (hex).
RO 0022h
Register 3h - PHY Identifier 2
3.15:10 PHY ID Num-
ber
Assigned to the 19th through 24th bits of the Orga-
nizationally Unique Identifier (OUI). KENDIN Com-
munication’s OUI is 0010A1 (hex).
RO 0001_01
3.9:4 Model Num-
ber
Six-bit manufacturer’s model number RO 01_0110
3.3:0 Revision
Number
Four-bit manufacturer’s revision number RO Indicates silicon revi-
sion to Rev. A; A2 =
0x0, A3 = 0x1.
Register 4h - Auto-Negotiation Advertisement
4.15 Next Page 1 = Next page capable
0 = No next page capability
Note: Recommend to set this bit to ‘0’.
RW 1
4.14 Reserved Reserved RO 0
4.13 Remote Fault 1 = Remote fault supported
0 = No remote fault
RW 0
4.12 Reserved Reserved RO 0
4.11:10 Pause [00] = No pause
[10] = Asymmetric pause
[01] = Symmetric pause
[11] = Asymmetric and symmetric pause
RW 00
4.9 100BASE-T4 1 = T4 capable
0 = No T4 capability
RO 0
4.8 100BASE-TX
Full-Duplex
1 = 100Mbps full-duplex capable
0 = No 100Mbps full-duplex capability
RW Set by the ANEN_-
SPEED strapping pin.
See the Strap-In
Options -
KSZ8081RNA/RND
section for details.
4.7 100BASE-TX
Half-Duplex
1 = 100Mbps half-duplex capable
0 = No 100Mbps half-duplex capability
RW Set by the ANEN_-
SPEED strapping pin.
See the Strap-In
Options -
KSZ8081RNA/RND
section for details.
4.6 10BASE-T
Full-Duplex
1 = 10Mbps full-duplex capable
0 = No 10Mbps full-duplex capability
RW 1
4.5 10BASE-T
Half-Duplex
1 = 10Mbps half-duplex capable
0 = No 10Mbps half-duplex capability
RW 1
4.4:0 Selector
Field
[00001] = IEEE 802.3 RW 0_0001
Register 5h - Auto-Negotiation Link Partner Ability
5.15 Next Page 1 = Next page capable
0 = No next page capability
RO 0
TABLE 4-2: REGISTER DESCRIPTIONS (CONTINUED)
Address Name Description
Mode
Note 4-1
Default