Specifications

2.3 Secondary Microcontroller

For the secondary microcontroller for the system, we needed a simple and very

low power consuming component. This secondary microcontroller will be battery

powered as connecting to a permanent power source is not the end goal for the

system. The secondary microcontroller will interface with the sensors and

802.15.4 ZigBee wireless chip. We have chosen to use the PIC24F04KA201, 20

Pin general purpose 16 Bit flash microcontrollers manufactured by Microchip®.

2.3.1 General Description and Pin Layout

The secondary microcontroller (PIC24F04KA201) has the operation range,

central processing unit (CPU), I/O, Analog-to-Digital Converter and other general

characteristics as follows:

Operation Range:

The operation range of this microcontroller is close to the industry standard. A

supply voltage is needed to run the microcontroller. Since this microcontroller is

going to be attached with the sensor and ZigBee devices, and powered by a

battery, it needs to be low powered like those components. This whole sub-

system of the secondary microcontroller will be battery powered, and have the

low supply voltage is essential to our design specifications and keep between the

temperatures of -40˚C and 85˚C. The PIC24F04KA201 features new nanoWatt

XLP (eXtreme Low Power) technology for the low power consumption required in

our system.

 Supply Voltage of 1.8 V – 3.6 V

 nanoWatt XLP

 -40˚C - 85˚C

The PIC24F04KA201 is also equipped with power saving technology such as

On-the-Fly Clock Switching, Doze mode, and Instruction-based power saving

modes. PIC24F devices have two special power-saving modes, entered through

the execution of a special PWRSAV instruction. The Sleep mode halts all code

execution; Idle mode halts the CPU and code execution, but allows the

peripheral modules to continue operation, such as the ZigBee and temperature/

humidity sensor. Deep Sleep mode stops clock operation, code execution and

peripherals. It also freezes the I/O states and removes power to the SRAM and

Flash memory. Combinations of these methods can be used to tailor our

applications power consumption by selectively managing clocking to the Central

Processing Unit (CPU)

CPU Characteristics:

 Up to 16 MIPS

 C complier optimized instruction set

 Modified Harvard architecture

 16-bit wide data path