Datasheet

ManualsBrandsMICROCHIP TECHNOLOGY ManualsDev KitsPCB design board

PIC32MX330/350/370/430/450/470

DS60001185C-page 82  2012-2013 Microchip Technology Inc.

TABLE 4-35: PARALLEL MASTER PORT REGISTER MAP

Virtual Address

(BF80_#)

Name

(1)

Bit Range

Bits

All Resets

31/15 30/14 29/13 28/12 27/11 26/10 25/9 24/8 23/7 22/6 21/5 20/4 19/3 18/2 17/1 16/0

7000 PMCON

31:16

— — — — — — — — — — — — — — — — 0000

15:0 ON

— SIDL ADRMUX<1:0> PMPTTL PTWREN PTRDEN CSF<1:0> ALP CS2P CS1P — WRSP RDSP 0000

7010 PMMODE

31:16 — — — — — — — — — — — — — — — — 0000

15:0 BUSY IRQM<1:0> INCM<1:0> MODE16 MODE<1:0> WAITB<1:0> WAITM<3:0> WAITE<1:0> 0000

7020 PMADDR

31:16

— — — — — — — — — — — — — — — — 0000

15:0

CS2 CS1

ADDR<13:0>

0000

7030 PMDOUT

31:16

DATAOUT<31:0>

0000

15:0 0000

7040 PMDIN

31:16

DATAIN<31:0>

0000

15:0 0000

7050 PMAEN

31:16

— — — — — — — — — — — — — — — — 0000

15:0

PTEN<15:0>

0000

7060 PMSTAT

31:16

— — — — — — — — — — — — — — — — 0000

15:0 IBF IBOV

— — IB3F IB2F IB1F IB0F OBE OBUF — — OB3E OB2E OB1E OB0E BFBF

Legend: x = unknown value on Reset; — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.

Note 1: All registers in this table have corresponding CLR, SET and INV registers at their virtual addresses, plus offsets of 0x4, 0x8 and 0xC, respectively. See Section 12.2 “CLR, SET, and INV Registers” for

more information.