Datasheet

 2012-2013 Microchip Technology Inc. DS60001185C-page 59
PIC32MX330/350/370/430/450/470
TABLE 4-15: FLASH CONTROLLER REGISTER MAP
Virtual Address
(BF80_#)
Register
Name
Bit Range
Bits
All Resets
31/15 30/14 29/13 28/12 27/11 26/10 25/9 24/8 23/7 22/6 21/5 20/4 19/3 18/2 17/1 16/0
F400 NVMCON
(1)
31:16 — — — — — — — — — — — — — — — — 0000
15:0 WR WREN WRERR LVDERR LVDSTAT
— — — — — — —NVMOP<3:0>0000
F410 NVMKEY
31:16
NVMKEY<31:0>
0000
15:0 0000
F420
NVMADDR
(1)
31:16
NVMADDR<31:0>
0000
15:0 0000
F430 NVMDATA
31:16
NVMDATA<31:0>
0000
15:0 0000
F440
NVMSRC
ADDR
31:16
NVMSRCADDR<31:0>
0000
15:0 0000
Legend: x = unknown value on Reset; — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
Note 1: This register has corresponding CLR, SET and INV registers at their virtual addresses, plus offsets of 0x4, 0x8 and 0xC, respectively. See Section 12.2 “CLR, SET, and INV Registers” for more
information.