Datasheet
2012-2013 Microchip Technology Inc. DS60001185C-page 53
PIC32MX330/350/370/430/450/470
9120 ADC1BUFB
31:16
ADC Result Word B (ADC1BUFB<31:0>)
0000
15:0 0000
9130 ADC1BUFC
31:16
ADC Result Word C (ADC1BUFC<31:0>)
0000
15:0 0000
9140 ADC1BUFD
31:16
ADC Result Word D (ADC1BUFD<31:0>)
0000
15:0 0000
9150 ADC1BUFE
31:16
ADC Result Word E (ADC1BUFE<31:0>)
0000
15:0 0000
9160 ADC1BUFF
31:16
ADC Result Word F (ADC1BUFF<31:0>)
0000
15:0 0000
TABLE 4-9: ADC REGISTER MAP (CONTINUED)
Virtual Address
(BF80_#)
Register
Name
Bit Range
Bits
All Resets
31/15 30/14 29/13 28/12 27/11 26/10 25/9 24/8 23/7 22/6 21/5 20/4 19/3 18/2 17/1 16/0
Legend: x = unknown value on Reset; — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
Note 1: All registers in this table have corresponding CLR, SET and INV registers at their virtual addresses, plus offsets of 0x4, 0x8 and 0xC, respectively. See Section 12.2 “CLR, SET, and INV Registers” for
details.