Datasheet

PIC32MX330/350/370/430/450/470
DS60001185C-page 338  2012-2013 Microchip Technology Inc.
O
Oscillator Configuration..................................................... 111
Output Compare................................................................ 191
P
Packaging ......................................................................... 321
Details ....................................................................... 323
Marking .....................................................................321
Parallel Master Port (PMP) ...............................................213
PIC32 Family USB Interface Diagram............................... 148
Pinout I/O Descriptions (table) ............................................ 18
Power-on Reset (POR)
and On-Chip Voltage Regulator................................ 264
Power-Saving Features..................................................... 249
CPU Halted Methods ................................................ 249
Operation .................................................................. 249
with CPU Running..................................................... 249
Prefetch Cache ................................................................. 121
R
Real-Time Clock and Calendar (RTCC)............................ 221
Register Map
ADC ............................................................................ 52
Bus Matrix ................................................................... 42
Comparator ................................................................. 58
Comparator Voltage Reference .................................. 58
CTMU.......................................................................... 84
Device and Revision ID Summary .............................. 61
Device Configuration Word Summary......................... 61
DMA Channel 0-3 ....................................................... 55
DMA CRC ................................................................... 54
DMA Global................................................................. 54
Flash Controller........................................................... 59
I2C1 and I2C2............................................................. 48
Input Capture 1-5 ........................................................ 46
Interrupt....................................................................... 43
Output Compare1-5 .................................................... 47
Parallel Master Port .................................................... 82
Peripheral Pin Select Input ......................................... 76
Peripheral Pin Select Output....................................... 78
PORTA........................................................................62
PORTB........................................................................63
PORTC ................................................................. 64, 65
PORTD ................................................................. 66, 67
PORTE.................................................................. 68, 69
PORTF......................................................70, 71, 72, 73
PORTG ................................................................. 74, 75
Prefetch....................................................................... 83
RTCC ..........................................................................84
SPI1 and SPI2 ............................................................ 51
System Control ........................................................... 60
Timer1-5......................................................................45
UART1-5 ..................................................................... 49
USB............................................................................. 85
Registers
[pin name]R (Peripheral Pin Select Input)................. 177
AD1CHS (ADC Input Select) .................................... 237
AD1CON1 (A/D Control 1) ........................................ 229
AD1CON1 (ADC Control 1) .............................. 229, 233
AD1CON2 (ADC Control 2) ...................................... 235
AD1CON3 (ADC Control 3) ...................................... 236
AD1CSSL (ADC Input Scan Select) ......................... 238
ALRMDATE (Alarm Date Value)............................... 229
ALRMDATECLR (ALRMDATE Clear)....................... 229
ALRMDATESET (ALRMDATE Set) ..........................229
ALRMTIME (Alarm Time Value) ............................... 228
ALRMTIMECLR (ALRMTIME Clear) ........................ 229
ALRMTIMEINV (ALRMTIME Invert) ......................... 229
ALRMTIMESET (ALRMTIME Set)............................ 229
BMXBOOTSZ (Boot Flash (IFM) Size ........................ 93
BMXCON (Bus Matrix Configuration) ......................... 88
BMXDKPBA (Data RAM Kernel Program 
Base Address).................................................... 89
BMXDRMSZ (Data RAM Size Register)..................... 92
BMXDUDBA (Data RAM User Data Base Address)... 90
BMXDUPBA (Data RAM User Program 
Base Address).................................................... 91
BMXPFMSZ (Program Flash (PFM) Size).................. 93
BMXPUPBA (Program Flash (PFM) User Program 
Base Address).................................................... 92
CHEACC (Cache Access) ........................................ 123
CHECON (Cache Control)........................................ 122
CHEHIT (Cache Hit Statistics).................................. 128
CHELRU (Cache LRU) ............................................. 127
CHEMIS (Cache Miss Statistics) .............................. 128
CHEMSK (Cache TAG Mask)................................... 125
CHETAG (Cache TAG)............................................. 124
CHEW0 (Cache Word 0) .......................................... 125
CHEW1 (Cache Word 1) .......................................... 126
CHEW2 (Cache Word 2) .......................................... 126
CHEW3 (Cache Word 3) .......................................... 127
CM1CON (Comparator 1 Control) ............................ 240
CMSTAT (Comparator Control Register).................. 241
CNCONx (Change Notice Control for PORTx) ......... 178
CTMUCON (CTMU Control)..................................... 246
CVRCON (Comparator Voltage Reference Control) 244
DCHxCON (DMA Channel x Control) ....................... 137
DCHxCPTR (DMA Channel x Cell Pointer) .............. 144
DCHxCSIZ (DMA Channel x Cell-Size).................... 144
DCHxDAT (DMA Channel x Pattern Data) ............... 145
DCHxDPTR (Channel x Destination Pointer) ........... 143
DCHxDSA (DMA Channel x Destination 
Start Address)................................................... 141
DCHxDSIZ (DMA Channel x Destination Size) ........ 142
DCHxECON (DMA Channel x Event Control) .......... 138
DCHxINT (DMA Channel x Interrupt Control)........... 139
DCHxSPTR (DMA Channel x Source Pointer) ......... 143
DCHxSSA (DMA Channel x Source Start Address) . 141
DCHxSSIZ (DMA Channel x Source Size) ............... 142
DCRCCON (DMA CRC Control)............................... 134
DCRCDATA (DMA CRC Data)................................. 136
DCRCXOR (DMA CRCXOR Enable) ....................... 136
DEVCFG0 (Device Configuration Word 0................. 253
DEVCFG1 (Device Configuration Word 1................. 255
DEVCFG2 (Device Configuration Word 2................. 257
DEVCFG3 (Device Configuration Word 3................. 259
DEVID (Device and Revision ID) .............................. 261
DMAADDR (DMA Address) ...................................... 133
DMAADDR (DMR Address)...................................... 133
DMACON (DMA Controller Control) ......................... 132
DMASTAT (DMA Status).......................................... 133
I2CxCON (I2C Control)............................................. 203
I2CxSTAT (I2C Status)............................................. 205
ICxCON (Input Capture x Control)............................ 188
IFSx (Interrupt Flag Status) ...................................... 108
INTCON (Interrupt Control)....................................... 106
INTSTAT (Interrupt Status)....................................... 107
IPCx (Interrupt Priority Control) ................................ 109
IPTMR Interrupt Proximity Timer)............................. 107
NVMADDR (Flash Address) ....................................... 97