Datasheet
2012-2013 Microchip Technology Inc. DS60001185C-page 253
PIC32MX330/350/370/430/450/470
27.0 SPECIAL FEATURES
PIC32MX330/350/370/430/450/470 devices include
several features intended to maximize application
flexibility and reliability and minimize cost through
elimination of external components. These are:
• Flexible device configuration
• Watchdog Timer (WDT)
• Joint Test Action Group (JTAG) interface
• In-Circuit Serial Programming™ (ICSP™)
27.1 Configuration Bits
The Configuration bits can be programmed using the
following registers to select various device
configurations.
• DEVCFG0: Device Configuration Word 0
• DEVCFG1: Device Configuration Word 1
• DEVCFG2: Device Configuration Word 2
• DEVCFG3: Device Configuration Word 3
• CFGCON: Configuration Control Register
In addition, the DEVID register (Register 27-6)
provides device and revision information.
Note 1: This data sheet summarizes the
features of the PIC32MX330/350/370/
430/450/470 family of devices. However,
it is not intended to be a comprehensive
reference source. To complement the
information in this data sheet, refer to
Section 9. “Watchdog Timer and
Power-up Timer” (DS60001114),
Section 32. “Configuration”
(DS60001124) and Section 33.
“Programming and Diagnostics”
(DS60001129) in the “PIC32 Family
Reference Manual”
, which are available
from the Microchip web site
(www.microchip.com/PIC32).
REGISTER 27-1: DEVCFG0: DEVICE CONFIGURATION WORD 0
Bit
Range
Bit
31/23/15/7
Bit
30/22/14/6
Bit
29/21/13/5
Bit
28/20/12/4
Bit
27/19/11/3
Bit
26/18/10/2
Bit
25/17/9/1
Bit
24/16/8/0
31:24
r-0 r-1 r-1 R/P r-1 r-1 r-1 R/P
— — —CP— — —BWP
23:16
r-1 r-1 r-1 r-1 R/P R/P R/P R/P
— — — —PWP<7:4>
15:8
R/P R/P R/P R/P r-1 r-1 r-1 r-1
PWP<3:0> — — — —
7:0
r-1 r-1 r-1 R/P R/P R/P R/P R/P
— — — ICESEL<1:0> JTAGEN
(1)
DEBUG<1:0>
Legend: r = Reserved bit P = Programmable bit
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 31 Reserved: Write ‘0’
bit 30-29 Reserved: Write ‘1’
bit 28 CP: Code-Protect bit
Prevents boot and program Flash memory from being read or modified by an external pro-
gramming device.
1 = Protection is disabled
0 = Protection is enabled
bit 27-25 Reserved: Write ‘1’
Note 1: This bit sets the value for the JTAGEN bit in the CFGCON register.