Datasheet

 2012-2013 Microchip Technology Inc. DS60001185C-page 193
PIC32MX330/350/370/430/450/470
17.0 SERIAL PERIPHERAL
INTERFACE (SPI)
The SPI module is a synchronous serial interface that
is useful for communicating with external peripherals
and other microcontroller devices. These peripheral
devices may be Serial EEPROMs, Shift registers, dis
-
play drivers, Analog-to-Digital Converters (ADC), etc.
The PIC32 SPI module is compatible with Motorola
®
SPI and SIOP interfaces.
Some of the key features of the SPI module are:
• Master and Slave modes support
• Four different clock formats
• Enhanced Framed SPI protocol support
• User-configurable 8-bit, 16-bit and 32-bit data width
• Separate SPI FIFO buffers for receive and transmit
- FIFO buffers act as 4/8/16-level deep FIFOs
based on 32/16/8-bit data width
• Programmable interrupt event on every 8-bit, 
16-bit and 32-bit data transfer
• Operation during CPU Sleep and Idle mode
• Audio Codec Support:
-I
2
S protocol
- Left-justified
- Right-justified
-PCM
FIGURE 17-1: SPI MODULE BLOCK DIAGRAM
Note 1: This data sheet summarizes the
features of the PIC32MX330/350/370/
430/450/470 family of devices. It is not
intended to be a comprehensive
reference source. To complement the
information in this data sheet, refer to
Section 23. “Serial Peripheral
Interface (SPI)” (DS60001106) in the
“PIC32 Family Reference Manual”
,
which is available from the Microchip
web site (www.microchip.com/PIC32).
2: Some registers and associated bits
described in this section may not be
available on all devices. Refer to
Section 4.0 “Memory Organization” in
this data sheet for device-specific register
and bit information.
Internal
Data Bus
SDIx
SDOx
SSx
/FSYNC
SCKx
SPIxSR
bit 0
Shift
Control
Edge
Select
MSTEN
Baud Rate
Slave Select
Sync Control
Clock
Control
Transmit
Receive
and Frame
Note: Access SPIxTXB and SPIxRXB FIFOs via SPIxBUF register.
FIFOs Share Address SPIxBUF
SPIxBUF
Generator
PBCLK
WriteRead
SPIxTXB FIFO
SPIxRXB FIFO
REFCLK
MCLKSEL
1
0