Datasheet

 2012-2013 Microchip Technology Inc. DS60001185C-page 103
PIC32MX330/350/370/430/450/470
7.0 INTERRUPT CONTROLLER
PIC32MX330/350/370/430/450/470 devices generate
interrupt requests in response to interrupt events from
peripheral modules. The interrupt control module exists
externally to the CPU logic and prioritizes the interrupt
events before presenting them to the CPU.
The PIC32MX330/350/370/430/450/470 interrupt
module includes the following features:
• Up to 76 interrupt sources
• Up to 46 interrupt vectors
• Single and multi-vector mode operations
• Five external interrupts with edge polarity control
• Interrupt proximity timer
• Seven user-selectable priority levels for each
vector
• Four user-selectable subpriority levels within each
priority
• Dedicated shadow set configurable for any priority level
(see the FSRSSEL<2:0> bits (DEVCFG3<18:16>) in
27.0 “Special Features” for more information)
• Software can generate any interrupt
• User-configurable interrupt vector table location
• User-configurable interrupt vector spacing
FIGURE 7-1: INTERRUPT CONTROLLER MODULE BLOCK DIAGRAM
Note 1: This data sheet summarizes the features
of the PIC32MX330/350/370/430/450/
470 family of devices. It is not intended to
be a comprehensive reference source.
To complement the information in this
data sheet, refer to Section 8. “Interrupt
Controller” (DS60001108) in the “PIC32
Family Reference Manual”, which
is
available from the Microchip web site
(www.microchip.com/PIC32).
2: Some registers and associated bits
described in this section may not be
available on all devices. Refer to
Section 4.0 “Memory Organization” in
this data sheet for device-specific register
and bit information.
Interrupt Controller
Interrupt Requests
Vector Number
CPU Core
Priority Level
Shadow Set Number