Datasheet

2012-2013 Microchip Technology Inc. DS60001185C-page 1
PIC32MX330/350/370/430/450/470
Operating Conditions
2.3V to 3.6V, -40ºC to +105ºC (DC to 80 MHz),
-40ºC to +85ºC (DC to 100 MHz)
Core: 100 MHz/131 DMIPS MIPS32
®
M4K
®
•MIPS16e
®
mode for up to 40% smaller code size
Code-efficient (C and Assembly) architecture
Single-cycle (MAC) 32x16 and two-cycle 32x32 multiply
Clock Management
0.9% internal oscillator
Programmable PLLs and oscillator clock sources
Fail-Safe Clock Monitor (FSCM)
Independent Watchdog Timer
Fast wake-up and start-up
Power Management
Low-power management modes (Sleep and Idle)
Integrated Power-on Reset, Brown-out Reset, and High
Voltage Detect
0.5 mA/MHz dynamic current (typical)
•50 μA IPD current (typical)
Audio/Graphics/Touch HMI Features
External graphics interface with up to 34 PMP pins
Audio data communication: I
2
S, LJ, RJ, USB
Audio data control interface: SPI and I
2
C™
Audio data master clock:
- Generation of fractional clock frequencies
- Can be synchronized with USB clock
- Can be tuned in run-time
Charge Time Measurement Unit (CTMU):
- Supports mTouch™ capacitive touch sensing
- Provides high-resolution time measurement (1 ns)
Advanced Analog Features
ADC Module:
- 10-bit 1 Msps rate with one Sample and Hold (S&H)
- Up to 28 analog inputs
- Can operate during Sleep mode
Flexible and independent ADC trigger sources
On-chip temperature measurement capability
Comparators:
- Two dual-input Comparator modules
- Programmable references with 32 voltage points
Timers/Output Compare/Input Capture
Five General Purpose Timers:
- Five 16-bit and up to two 32-bit Timers/Counters
Five Output Compare (OC) modules
Five Input Capture (IC) modules
Peripheral Pin Select (PPS) to allow function remap
Real-Time Clock and Calendar (RTCC) module
Communication Interfaces
USB 2.0-compliant Full-speed OTG controller
Up to five UART modules (20 Mbps):
- LIN 1.2 protocols and IrDA
®
support
Two 4-wire SPI modules (25 Mbps)
•Two I
2
C modules (up to 1 Mbaud) with SMBus support
PPS to allow function remap
Parallel Master Port (PMP)
Direct Memory Access (DMA)
Four channels of hardware DMA with automatic data
size detection
32-bit Programmable Cyclic Redundancy Check (CRC)
Two additional channels dedicated to USB
Input/Output
15 mA or 12 mA source/sink for standard VOH/VOL and
up to 22 mA for non-standard V
OH
1
5V-tolerant pins
Selectable open drain, pull-ups, and pull-downs
External interrupts on all I/O pins
Qualification and Class B Support
AEC-Q100 REVG (Grade 2 -40ºC to +105ºC) planned
Class B Safety Library, IEC 60730
Debugger Development Support
In-circuit and in-application programming
4-wire MIPS
®
Enhanced JTAG interface
Unlimited program and six complex data breakpoints
IEEE 1149.2-compatible (JTAG) boundary scan
Packages
Type QFN TQFP VTLA
Pin Count 64 64 100 100 124
I/O Pins (up to) 53 53 85 85 85
Contact/Lead Pitch 0.50 0.50 0.40 0.50 0.50
Dimensions 9x9x0.9 10x10x1 12x12x1 14x14x1 9x9x0.9
Note: All dimensions are in millimeters (mm) unless specified.
32-bit Microcontrollers (up to 512 KB Flash and 128 KB SRAM)
with Audio/Graphics/Touch (HMI), USB, and Advanced Analog

Summary of content (344 pages)