Information

www.microchip.com/UNIO
Inside the UNI/O EEPROM
Status
Register
HV Generator
I/O Control
Logic
Current-
Limited
Slope
Control
EEPROM
Array
Page Latches
Y Decoder
Sense Amp.
R/W Control
Memory
Control
Logic
X
Dec
I/O Communication
• Manchester encoding/
decoding
• Synchronization circuitry
• Software addressing
Robust Interface
• Current limited
• Protection during short circuits
and bus confl icts
• Superior EMI performance
Memory Control Logic
• Controls for internal clock and data
• Byte or page write
• Erase all or set all
Status Register
• Write In Process (WIP) bit
• Write Enable Latch (WEL) bit
• Block protection bits
– Write protect for ¼,½ or
full array
EEPROM Memory
• Density: 1K, 2K, 4K, 8K & 16K
• Endurance > 1 Million Cycles
• Data Retention > 200 Years
Page Buffer
• 16 byte page
GND
SCIO
VCC