Datasheet
Table Of Contents
- TABLE 1: Silicon DEVREV Values
- TABLE 2: Silicon Issue Summary
- Silicon Errata Issues
- Data Sheet Clarifications
- 1. Module: Table 27-1: Memory Programming Requirements
- 2. Module: Table 27-2: Comparator Specifications
- 3. Module: Table 27-4: Internal Voltage Regulator Specifications
- 4. Module: Section 27.3 “DC Characteristics: PIC18F87J11 Family (Industrial)”
- 5. Module: Example 6-2: Erasing a Flash Program Memory Row
- 6. Module: Section 19.3 “SPI Mode” and Section 19.4 “I2C™ Mode”
- 7. Module: Figure 19-10: I2C™ Slave Mode Timing (Transmission, 7-Bit Address)
- 8. Module: Figure 19-24: I2C™ Master Mode Waveform (Reception, 7-Bit Address)
- 9. Module: Table 1-3: PIC18F6XJ1X Pinout I/O Descriptions
- 10. Module: Memory Organization
- 11. Module: Memory Organization
- 12. Module: Electrical Specification
- Document Revision History
- Worldwide Sales and Service

2011 Microchip Technology Inc. DS80495E-page 5
PIC18F87J11 FAMILY
Data Sheet Clarifications
The following typographic corrections and clarifications
are to be noted for the latest version of the device data
sheet (DS39778D):
1. Module: Table 27-1: Memory
Programming Requirements
On page 398, the parameter, D132, which pro-
vides the minimum and maximum voltage levels of
the Self-Timed Erase or Write for VDD and
V
DDCORE, are included. A new parameter (D133B)
is added. The T
WE parameter number and
conditions column are changed. The changed/
appended values are indicated in bold text in the
following table:
TABLE 27-1: MEMORY PROGRAMMING REQUIREMENTS
Note: Corrections are shown in bold. Where
possible, the original bold text formatting
has been removed for clarity.
DC CHARACTERISTICS
Standard Operating Conditions (unless otherwise stated)
Operating temperature -40°C T
A +85°C for industrial
Param
No.
Sym Characteristic Min Typ† Max Units Conditions
Program Flash Memory
D130 E
P Cell Endurance 10K — — E/W -40C to +85C
D131 VPR VDD for Read VMIN —3.6VVMIN = Minimum operating
voltage
D132B V
PEW Voltage for Self-Timed Erase or
Write
V
DD
VDDCORE
2.35
2.25
—
—
3.6
2.7
V
V
ENVREG tied to VDD
ENVREG tied to VSS
D133A TIW Self-Timed Write Cycle Time — 2.8 — ms
D133B TIE Self-Timed Page Erase Cycle
Time
—33.0—ms
D134 T
RETD Characteristic Retention 20 — — Year Provided no other
specifications are violated
D135 I
DDP Supply Current during
Programming
—314mA
D140 T
WE Writes per Erase Cycle — — 1 — For each physical address
† Data in “Typ” column is at 3.3V, 25°C unless otherwise stated. These parameters are for design guidance
only and are not tested.