Datasheet

Table Of Contents
2011 Microchip Technology Inc. DS80495E-page 11
PIC18F87J11 FAMILY
FIGURE 19-24: I
2
C™ MASTER MODE WAVEFORM (RECEPTION, 7-BIT ADDRESS)
P
98765
D0D1D2D3D4D5D6D7
S
A7 A6 A5 A4 A3 A2 A1
SDAx
SCLx
123456789 12345678 9
123 4
Bus master
terminates
transfer
ACK
Receiving Data from Slave
Receiving Data from Slave
D0D1D2D3D4D5D6D7
ACK
R/W = 1
Transmit Address to Slave
SSPxIF
BF
ACK is not sent
Write to SSPxCON2<0> (SEN = 1),
Write to SSPxBUF occurs here,
ACK from Slave
Master configured as a receiver
by programming SSPxCON2<3> (RCEN = 1)
PEN bit = 1
written here
Data shifted in on falling edge of CLK
Cleared in software
start XMIT
SEN = 0
SSPOV
SDAx = 0, SCLx = 1
while CPU
ACK
Cleared in software
Cleared in software
Set SSPxIF interrupt
at end of receive
Set P bit
(SSPSTAT<4>)
and SSPxIF
ACK from Master,
Set SSPxIF at end
Set SSPxIF interrupt
at end of Acknowledge
sequence
Set SSPxIF interrupt
at end of Acknowledge
sequence
of receive
Set ACKEN, start Acknowledge sequence,
SDAx = ACKDT = 1
RCEN cleared
automatically
RCEN = 1, start
next receive
Write to SSPxCON2<4>
to start Acknowledge sequence,
SDAx = ACKDT (SSPxCON2<5>) = 0
RCEN cleared
automatically
ACKEN
begin Start condition
Cleared in software
SDAx = ACKDT = 0
Last bit is shifted into SSPSR and
contents are unloaded into SSPxBUF
Cleared in
software
SSPOV is set because
SSPxBUF is still full
responds to SSPxIF