Datasheet
Table Of Contents
- TABLE 1: Silicon DEVREV Values
- TABLE 2: Silicon Issue Summary
- Silicon Errata Issues
- Data Sheet Clarifications
- 1. Module: Table 27-1: Memory Programming Requirements
- 2. Module: Table 27-2: Comparator Specifications
- 3. Module: Table 27-4: Internal Voltage Regulator Specifications
- 4. Module: Section 27.3 “DC Characteristics: PIC18F87J11 Family (Industrial)”
- 5. Module: Example 6-2: Erasing a Flash Program Memory Row
- 6. Module: Section 19.3 “SPI Mode” and Section 19.4 “I2C™ Mode”
- 7. Module: Figure 19-10: I2C™ Slave Mode Timing (Transmission, 7-Bit Address)
- 8. Module: Figure 19-24: I2C™ Master Mode Waveform (Reception, 7-Bit Address)
- 9. Module: Table 1-3: PIC18F6XJ1X Pinout I/O Descriptions
- 10. Module: Memory Organization
- 11. Module: Memory Organization
- 12. Module: Electrical Specification
- Document Revision History
- Worldwide Sales and Service

PIC18F87J11 FAMILY
DS80495E-page 10 2011 Microchip Technology Inc.
8. Module: Figure 19-24: I
2
C™ Master Mode
Waveform (Reception, 7-Bit
Address)
On page 261, the condition (R/W) when the Acknowl-
edge signal (ACK) is received from the slave, after
transmitting the address to the slave, is changed to ‘1’.
The changed value is indicated in bold text in
Figure 19-24.