Datasheet

PICkit™ 3 Debug Express

3.9 LESSON 9: INTERNAL OSCILLATOR

Using the on-chip internal oscillator and PLL (Phase Locked Loop) of the

PIC18F45K20 is discussed. Clocks from 31 kHz up to 64 MHz can be generated

without requiring external oscillator components.

3.9.1 The Internal Oscillator Block

The internal oscillator block of the PIC18F45K20 generates two different clock signals.

The main output, INTOSC, is a factory calibrated 16 MHz clock source with postscaler

that can provide a range of clock frequencies down to 31 kHz.

The other output, INTRC, is a nominal 31 kHz clock source that drives peripherals such

as the Power-up Timer, the Fail-Safe Clock Monitor, the Watchdog Timer and the

Two-Speed Start-up feature.

When the oscillator block is set to provide a 31 kHz clock to the microcontroller, it can

be selected as a postscaled output of INTOSC, which has the benefit of calibrated

accuracy, or INTRC, which has the benefit of lower power consumption.

The oscillator block also contains a 4x PLL (Phase Locked Loop) frequency multiplier

that can increase the microcontroller clock source up to 32 MHz. The PLL is only

available when the internal oscillator block selected output is 8 MHz or 16 MHz. It will

multiply the base 4 MHz signal by 4 to 32 MHz, and the 8 MHz base clock to 64 MHz.

This allows the internal oscillator block to provide a range of 10 different software

selectable frequencies of 31 kHz, 250 kHz, 500 kHz, 1 MHz, 2 MHz, 4MHz, 8 MHz, 16

MHz and (with the PLL) 32 MHz and 64 MHz. Recall from previous lessons that the

default frequency on a Reset is 1 MHz.

FIGURE 3-45: SIMPLIFIED INTERNAL OSCILLATOR BLOCK DIAGRAM

Key Concepts

- To use the internal oscillator block, set the OSC Configuration bits to

INTIO67 or INTIO7. The latter outputs the clock signal CLKO on the RA6

pin.

- The OSCCON Special Function Register is used to set the base internal

oscillator frequency from 31 kHZ up to 16 MHz.

- The OSCTUNE register allows the internal oscillator frequency to be

adjusted on a fine scale and enables or disables the PLL.

- The 4x PLL may only be used when base frequencies of 8 MHz or 16 MHz

are selected in OSCCON. Enabling the PLL multiplies the base frequency by

4, providing clocks at 32 MHz and 64 MHz, respectively.