User manual

MPLAB
®
PM3 User’s Guide
DS51464C-page 126 © 2006 Microchip Technology Inc.
Real-Time
When released from the halt state in the emulator or MPLAB ICD mode, the processor
runs in Real-Time mode and behaves exactly as the normal chip would behave. In
Real-Time mode, the real-time trace buffer of MPLAB ICE is enabled and constantly
captures all selected cycles, and all break logic is enabled. In the emulator or MPLAB
ICD, the processor executes in real-time until a valid breakpoint causes a halt, or until
the user halts the emulator. In the simulator real-time simply means execution of the
microcontroller instructions as fast as they can be simulated by the host CPU.
Recursion
The concept that a function or macro, having been defined, can call itself. Great care
should be taken when writing recursive macros; it is easy to get caught in an infinite
loop where there will be no exit from the recursion.
ROM
Read Only Memory (Program Memory). Memory that cannot be modified.
Run
The command that releases the emulator from halt, allowing it to run the application
code and change or respond to I/O in real time.
Serialized Quick Turn Programming
Serialization allows you to program a serial number into each microcontroller device
that the Device Programmer programs. This number can be used as an entry code,
password or ID number.
SFR
See Special Function Registers.
Shell
The MPASM assembler shell is a prompted input interface to the macro assembler.
There are two MPASM assembler shells: one for the DOS version and one for the
Windows version.
Simulator
A software program that models the operation of devices.
Single Step
This command steps though code, one instruction at a time. After each instruction,
MPLAB IDE updates register windows, watch variables and status displays so you can
analyze and debug instruction execution. You can also single step C compiler source
code, but instead of executing single instructions, MPLAB IDE will execute all assembly
level instructions generated by the line of the high-level C statement.
Skew
The information associated with the execution of an instruction appears on the
processor bus at different times. For example, the executed Opcodes appears on the
bus as a fetch during the execution of the previous instruction, the source data address
and value and the destination data address appear when the Opcodes is actually
executed and the destination data value appears when the next instruction is executed.
The trace buffer captures the information that is on the bus at one instance. Therefore,
one trace buffer entry will contain execution information for three instructions. The
number of captured cycles from one piece of information to another for a single
instruction execution is referred to as the skew.