Datasheet

dsPIC33FJXXXMCX06A/X08A/X10A
DS70594D-page 258  2009-2012 Microchip Technology Inc.
REGISTER 22-9: ADxPCFGH: ADCx PORT CONFIGURATION REGISTER HIGH
(1,2,3,4)
R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
PCFG31 PCFG30 PCFG29 PCFG28 PCFG27 PCFG26 PCFG25 PCFG24
bit 15 bit 8
R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
PCFG23 PCFG22 PCFG21 PCFG20 PCFG19 PCFG18 PCFG17 PCFG16
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 15-0 PCFG<31:16>: ADC Port Configuration Control bits
1 = Port pin in Digital mode; port read input enabled; ADC input multiplexer connected to AV
SS
0 = Port pin in Analog mode; port read input disabled; ADC samples pin voltage
Note 1: On devices without 32 analog inputs, all PCFG bits are R/W by user. However, PCFG bits are ignored on
ports without a corresponding input on the device.
2: ADC2 only supports analog inputs, AN0-AN15; therefore, no ADC2 port Configuration register exists.
3: PCFGx = ANx, where x = 16 through 31.
4: The PCFGx bits have no effect if the ADC module is disabled by setting the ADxMD bit in the PMDx
register. In this case, all port pins multiplexed with ANx will be in Digital mode.
REGISTER 22-10: ADxPCFGL: ADCx PORT CONFIGURATION REGISTER LOW
(1,2,3,4)
R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
PCFG15 PCFG14 PCFG13 PCFG12 PCFG11 PCFG10 PCFG9 PCFG8
bit 15 bit 8
R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
PCFG7 PCFG6 PCFG5 PCFG4 PCFG3 PCFG2 PCFG1 PCFG0
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 15-0 PCFG<15:0>: ADC Port Configuration Control bits
1 = Port pin in Digital mode; port read input enabled; ADC input multiplexer connected to AV
SS
0 = Port pin in Analog mode; port read input disabled; ADC samples pin voltage
Note 1: On devices without 16 analog inputs, all PCFG bits are R/W by user. However, PCFG bits are ignored on
ports without a corresponding input on the device.
2: On devices with two analog-to-digital modules, both AD1PCFGL and AD2PCFGL will affect the
configuration of port pins multiplexed with AN0-AN15.
3: PCFGx = ANx, where x = 0 through 15.
4: The PCFGx bits have no effect if the ADC module is disabled by setting the ADxMD bit in the PMDx
register. In this case, all port pins multiplexed with ANx will be in Digital mode.