Datasheet

dsPIC33FJXXXMCX06A/X08A/X10A
DS70594D-page 184  2009-2012 Microchip Technology Inc.
REGISTER 16-5: PWMxCON1: PWMx CONTROL REGISTER 1
U-0 U-0 U-0 U-0 R/W-0 R/W-0 R/W-0 R/W-0
— — — — PMOD4 PMOD3 PMOD2 PMOD1
bit 15 bit 8
R/W-1 R/W-1 R/W-1 R/W-1 R/W-1 R/W-1 R/W-1 R/W-1
PEN4H
(1)
PEN3H
(1)
PEN2H
(1)
PEN1H
(1)
PEN4L
(1)
PEN3L
(1)
PEN2L
(1)
PEN1L
(1)
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 15-12 Unimplemented: Read as ‘0’
bit 11-8 PMOD<4:1>: PWM I/O Pair Mode bits
1 = PWM I/O pin pair is in the Independent PWM Output mode
0 = PWM I/O pin pair is in the Complementary Output mode
bit 7-4 PEN4H:PEN1H: PWMxH I/O Enable bits
(1)
1 = PWMxH pin is enabled for PWM output
0 = PWMxH pin is disabled; I/O pin becomes general purpose I/O
bit 3-0 PEN4L:PEN1L: PWMxL I/O Enable bits
(1)
1 = PWMxL pin is enabled for PWM output
0 = PWMxL pin is disabled; I/O pin becomes general purpose I/O
Note 1: Reset condition of the PENxH and PENxL bits depends on the value of the PWMPIN Configuration bit in
the FPOR Configuration register.