Datasheet

© 2007-2012 Microchip Technology Inc. DS70291G-page 219
dsPIC33FJ32MC302/304, dsPIC33FJ64MCX02/X04 AND dsPIC33FJ128MCX02/X04
REGISTER 16-4: PxSECMP: SPECIAL EVENT COMPARE REGISTER
R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
SEVTDIR
(1)
SEVTCMP<14:8>
(2)
bit 15 bit 8
R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
SEVTCMP<7:0>
(2)
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 15 SEVTDIR: Special Event Trigger Time Base Direction bit
(1)
1 = A Special Event Trigger occurs when the PWM time base is counting downward
0 = A Special Event Trigger occurs when the PWM time base is counting upward
bit 14-0 SEVTCMP<14:0>: Special Event Compare Value bits
(2)
Note 1: This bit is compared with the PTDIR bit (PXTMR<15>) to generate the Special Event Trigger.
2: The PxSECMP<14:0> bits are compared with the P
XTMR<14:0> bits to generate the Special Event
Trigger.