Datasheet
2009-2012 Microchip Technology Inc. DS70591E-page 343
dsPIC33FJ32GS406/606/608/610 and dsPIC33FJ64GS406/606/608/610
REGISTER 23-1: CMPCONx: COMPARATOR CONTROL x REGISTER
R/W-0 U-0 R/W-0 U-0 U-0 U-0 U-0 R/W-0
CMPON
— CMPSIDL r r r rDACOE
bit 15 bit 8
R/W-0 R/W-0 R/W-0 U-0 R/W-0 U-0 R/W-0 R/W-0
INSEL<1:0> EXTREF
rCMPSTAT r CMPPOL RANGE
bit 7 bit 0
Legend: r = Reserved bit
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 15 CMPON: Comparator Operating Mode bit
1 = Comparator module is enabled
0 = Comparator module is disabled (reduces power consumption)
bit 14 Unimplemented: Read as ‘0’
bit 13 CMPSIDL: Comparator Stop in Idle Mode bit
1 = Discontinues module operation when device enters Idle mode.
0 = Continues module operation in Idle mode
If a device has multiple comparators, any CMPSIDL bit set to ‘1’ disables ALL comparators while in
Idle mode.
bit 12-9 Reserved: Read as ‘0’
bit 8 DACOE: DAC Output Enable
1 = DAC analog voltage is output to DACOUT pin
(1)
0 = DAC analog voltage is not connected to DACOUT pin
bit 7-6 INSEL<1:0>: Input Source Select for Comparator bits
11 = Selects CMPxD input pin
10 = Selects CMPxC input pin
01 = Selects CMPxB input pin
00 = Selects CMPxA input pin
bit 5 EXTREF: Enable External Reference bit
1 = External source provides reference to DAC (maximum DAC voltage determined by external
voltage source)
0 = Internal reference sources provide reference to DAC (maximum DAC voltage determined by
RANGE bit setting)
bit 4 Reserved: Read as ‘0’
bit 3 CMPSTAT: Current State of Comparator Output Including CMPPOL Selection bit
bit 2 Reserved: Read as ‘0’
bit 1 CMPPOL: Comparator Output Polarity Control bit
1 = Output is inverted
0 = Output is non-inverted
bit 0 RANGE: Selects DAC Output Voltage Range bit
1 = High Range: Max DAC Value = AV
DD/2, 1.65V at 3.3V AVDD
0 = Low Range: Max DAC Value = INTREF
Note 1: DACOUT can be associated only with a single comparator at any given time. The software must ensure
that multiple comparators do not enable the DAC output by setting their respective DACOE bit.