Datasheet

 2009-2012 Microchip Technology Inc. DS70591E-page 239
dsPIC33FJ32GS406/606/608/610 and dsPIC33FJ64GS406/606/608/610
REGISTER 16-8: SSEVTCMP: PWM SECONDARY SPECIAL EVENT COMPARE REGISTER
R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
SSEVTCMP<15:8>
bit 15 bit 8
R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 U-0 U-0 U-0
SSEVTCMP<7:3>
— — —
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 15-3 SSEVTCMP<15:3>: Special Event Compare Count Value bits
bit 2-0 Unimplemented: Read as ‘0’
REGISTER 16-9: CHOP: PWM CHOP CLOCK GENERATOR REGISTER
(1)
R/W-0 U-0 U-0 U-0 U-0 U-0 R/W-0 R/W-0
CHPCLKEN
— — — — — CHOP<9:8>
bit 15 bit 8
R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 U-0 U-0 U-0
CHOP<7:3>
— — —
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 15 CHPCLKEN: Enable Chop Clock Generator bit
1 = Chop clock generator is enabled
0 = Chop clock generator is disabled
bit 14-10 Unimplemented: Read as ‘0’
bit 9-3 CHOP<9:3>: Chop Clock Divider bits
Value in 8.32 ns increments. The frequency of the chop clock signal is given by the following
expression:
Chop Frequency = 1/(16.64 * (CHOP<7:3> + 1) * Primary Master PWM Input Clock Period)
bit 2-0 Unimplemented: Read as ‘0’
Note 1: The chop clock generator operates with the primary PWM clock prescaler (PCLKDIV<2:0>) in the
PTCON2 register (Register 16-2).