Datasheet

 2009-2012 Microchip Technology Inc. DS70591E-page 341
dsPIC33FJ32GS406/606/608/610 and dsPIC33FJ64GS406/606/608/610
23.0 HIGH-SPEED ANALOG
COMPARATOR
The dsPIC33F Switch Mode Power Supply (SMPS)
comparator module monitors current and/or voltage
transients that may be too fast for the CPU and ADC to
capture.
23.1 Features Overview
The SMPS comparator module offers the following
major features:
• 16 Selectable Comparator Inputs
• Up to Four Analog Comparators
• 10-Bit DAC for each Analog Comparator
• Programmable Output Polarity
• Interrupt Generation Capability
• DACOUT Pin to provide DAC Output
• DAC has Three Ranges of Operation:
-AV
DD/2
- Internal Reference (INTREF)
- External Reference (EXTREF)
• ADC Sample-and-Convert Trigger Capability
• Disable Capability reduces Power Consumption
• Functional Support for PWM module:
- PWM duty cycle control
- PWM period control
- PWM Fault detect
23.2 Module Description
Figure 23-1 shows a functional block diagram of one
analog comparator from the SMPS comparator
module. The analog comparator provides high-speed
operation with a typical delay of 20 ns. The comparator
has a typical offset voltage of ±5 mV. The negative
input of the comparator is always connected to the
DAC circuit. The positive input of the comparator is
connected to an analog multiplexer that selects the
desired source pin.
The analog comparator input pins are typically shared
with pins used by the Analog-to-Digital Converter
(ADC) module. Both the comparator and the ADC can
use the same pins at the same time. This capability
enables a user to measure an input voltage with the
ADC and detect voltage transients with the
comparator.
FIGURE 23-1: HIGH-SPEED ANALOG COMPARATOR x MODULE BLOCK DIAGRAM
Note 1: This data sheet summarizes the features of
the dsPIC33FJ32GS406/606/608/610 and
dsPIC33FJ64GS406/606/608/610 fami-
lies of devices. It is not intended to be a
comprehensive reference source. To
complement the information in this data
sheet, refer to Section 45. “High-Speed
Analog Comparator” (DS70296) in the
“dsPIC33F/PIC24H Family Reference
Manual”, which is available from the
Microchip web site (www.microchip.com).
2: Some registers and associated bits
described in this section may not be
available on all devices. Refer to
Section 4.0 “Memory Organization” in
this data sheet for device-specific register
and bit information.
CMPxA*
CMPxC*
DAC
CMPPOL
0
1
AVDD/2
INTREF
(1)
M
U
X
CMREF
CMPx*
INSEL<1:0>
10
Trigger to PWM
Interrupt
CMPxB*
CMPxD*
Pulse
EXTREF
(1)
Status
AVSS
Generator
RANGE
DACOUT
DACOE
* x = 1, 2, 3 and 4
Note 1: Refer to Parameters DA01 and DA08 in the DAC Module Specifications (Table 27-43) for details.
M
U
X
Glitch Filter
Request