Datasheet

dsPIC33FJ32GS406/606/608/610 and dsPIC33FJ64GS406/606/608/610
DS70591E-page 314 2009-2012 Microchip Technology Inc.
FIGURE 22-4: ADC BLOCK DIAGRAM FOR dsPIC33FJ32GS610 AND dsPIC33FJ64GS610
DEVICES WITH TWO SARS
AN25
(2)
Even Numbered Inputs with Dedicated
Odd Numbered Inputs
with Shared S&H
Even Numbered Inputs
with Shared S&H
Data
Format
SAR
Core
Seven
Registers
16-Bit
SAR
Core
Sample and Hold (S&H) Circuits
Bus Interface
AN0
AN2
AN6
AN1
AN3
AN8
AN10
Data
Format
Seven
Registers
16-Bit
AN4
AN5
AN7
AN9
AN11
(INTREF)
AN24
(1)
(EXTREF)
AN13
AN15
AN12
AN14
AN16
AN17
AN19
AN21
AN23
AN18
AN20
AN22
Note 1: AN24 (EXTREF) is an internal analog input. To measure the voltage at AN24 (EXTREF), an analog comparator must
be enabled and EXTREF must be selected as the comparator reference.
2: AN25 (INTREF) is an internal analog input and is not available on a pin.