Datasheet

dsPIC33FJ32GP302/304, dsPIC33FJ64GPX02/X04, AND dsPIC33FJ128GPX02/X04
DS70292G-page 236 © 2007-2012 Microchip Technology Inc.
REGISTER 19-5: CiFIFO: ECAN™ FIFO STATUS REGISTER
U-0 U-0 R-0 R-0 R-0 R-0 R-0 R-0
— — FBP<5:0>
bit 15 bit 8
U-0 U-0 R-0 R-0 R-0 R-0 R-0 R-0
— — FNRB<5:0>
bit 7 bit 0
Legend: C = Writable bit, but only ‘0’ can be written to clear the bit
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 15-14 Unimplemented: Read as ‘0’
bit 13-8 FBP<5:0>: FIFO Buffer Pointer bits
011111 = RB31 buffer
011110 = RB30 buffer
•
•
•
000001 = TRB1 buffer
000000 = TRB0 buffer
bit 7-6 Unimplemented: Read as ‘0’
bit 5-0 FNRB<5:0>: FIFO Next Read Buffer Pointer bits
011111 = RB31 buffer
011110 = RB30 buffer
•
•
•
000001 = TRB1 buffer
000000 = TRB0 buffer