Datasheet
dsPIC33FJ32MC202/204 and dsPIC33FJ16MC304
DS70283K-page 322 © 2007-2012 Microchip Technology Inc.
H
High Temperature Electrical Characteristics..................... 281
I
I/O Ports ............................................................................ 117
Parallel I/O (PIO)....................................................... 117
Write/Read Timing .................................................... 118
I
2
C
Addresses ................................................................. 187
Operating Modes ...................................................... 185
Registers................................................................... 187
Software Controlled Clock Stretching (STREN = 1).. 187
I
2
C Module
I2C1 Register Map ...................................................... 39
In-Circuit Debugger ........................................................... 217
In-Circuit Emulation........................................................... 211
In-Circuit Serial Programming (ICSP) ....................... 211, 217
Input Capture .................................................................... 151
Registers................................................................... 153
Input Change Notification.................................................. 118
Instruction Addressing Modes............................................. 46
File Register Instructions ............................................ 46
Fundamental Modes Supported.................................. 47
MAC Instructions......................................................... 47
MCU Instructions ........................................................ 46
Move and Accumulator Instructions............................ 47
Other Instructions........................................................ 47
Instruction Set
Overview ................................................................... 222
Summary................................................................... 219
Instruction-Based Power-Saving Modes ........................... 111
Idle ............................................................................ 112
Sleep......................................................................... 111
Interfacing Program and Data Memory Spaces .................. 51
Internal RC Oscillator
Use with WDT ........................................................... 216
Internet Address................................................................ 325
Interrupt Control and Status Registers................................ 74
IECx ............................................................................ 74
IFSx............................................................................. 74
INTCON1 .................................................................... 74
INTCON2 .................................................................... 74
IPCx ............................................................................ 74
Interrupt Setup Procedures ............................................... 100
Initialization ............................................................... 100
Interrupt Disable........................................................ 100
Interrupt Service Routine .......................................... 100
Trap Service Routine ................................................ 100
Interrupt Vector Table (IVT) ................................................ 71
Interrupts Coincident with Power Save Instructions.......... 112
J
JTAG Boundary Scan Interface ........................................ 211
JTAG Interface .................................................................. 217
M
Memory Organization.......................................................... 29
Microchip Internet Web Site .............................................. 325
Modulo Addressing ............................................................. 48
Applicability ................................................................. 49
Operation Example ..................................................... 48
Start and End Address................................................ 48
W Address Register Selection .................................... 48
Motor Control PWM........................................................... 159
Motor Control PWM Module
2-Output Register Map................................................ 38
6-Output Register Map for dsPIC33FJ12MC202........ 38
MPLAB ASM30 Assembler, Linker, Librarian ................... 228
MPLAB Integrated Development Environment Software.. 227
MPLAB PM3 Device Programmer .................................... 230
MPLAB REAL ICE In-Circuit Emulator System ................ 229
MPLINK Object Linker/MPLIB Object Librarian ................ 228
N
NVM Module
Register Map .............................................................. 45
O
Open-Drain Configuration................................................. 118
Oscillator Configuration .................................................... 101
Output Compare ............................................................... 155
P
Packaging ......................................................................... 295
Details....................................................................... 297
Marking............................................................. 295, 296
Peripheral Module Disable (PMD) .................................... 112
Pinout I/O Descriptions (table)............................................ 11
PMD Module
Register Map .............................................................. 45
PORTA
Register Map for dsPIC33FJ32MC202....................... 43
Register Map for dsPIC33FJ32MC204 and
dsPIC33FJ16MC304 .......................................... 43
PORTB
Register Map .............................................................. 44
PORTC
Register Map dsPIC33FJ32MC204 and
dsPIC33FJ16MC304 .......................................... 44
Power-on Reset (POR)....................................................... 67
Power-Saving Features .................................................... 111
Clock Frequency and Switching ............................... 111
Program Address Space..................................................... 29
Construction ............................................................... 51
Data Access from Program Memory Using
Program Space Visibility..................................... 54
Data Access from Program Memory
Using Table Instructions ..................................... 53
Data Access from, Address Generation ..................... 52
Memory Map............................................................... 29
Table Read Instructions
TBLRDH ............................................................. 53
TBLRDL.............................................................. 53
Visibility Operation ...................................................... 54
Program Memory
Interrupt Vector........................................................... 30
Organization ............................................................... 30
Reset Vector............................................................... 30
PWM Time Base............................................................... 163
Q
Quadrature Encoder Interface (QEI)................................. 173
Quadrature Encoder Interface (QEI) Module
Register Map .............................................................. 39
R
Reader Response............................................................. 326
Registers
AD1CHS0 (ADC1 Input Channel 0 Select ................ 209
AD1CHS123 (ADC1 Input Channel 1, 2, 3 Select)... 207
AD1CON1 (ADC1 Control 1) .................................... 203
AD1CON2 (ADC1 Control 2) .................................... 205
AD1CON3 (ADC1 Control 3) .................................... 206