Datasheet

© 2007-2012 Microchip Technology Inc. DS70283K-page 201
dsPIC33FJ32MC202/204 and dsPIC33FJ16MC304
FIGURE 20-2: ADC1 MODULE BLOCK DIAGRAM FOR dsPIC33FJ32MC202 DEVICE
SAR ADC
S/H0
S/H1
ADC1BUF0
ADC1BUF1
ADC1BUF2
ADC1BUFF
ADC1BUFE
AN0
AN5
AN1
VREFL
CH0SB<4:0>
CH0NA
CH0NB
+
-
AN0
AN3
CH123SA
VREFL
CH123SB
CH123NA
CH123NB
+
-
S/H2
AN1
AN4
CH123SA
VREFL
CH123SB
CH123NA
CH123NB
+
-
S/H3
AN2
AN5
CH123SA
VREFL
CH123SB
CH123NA
CH123NB
+
-
CH1
(2)
CH0
CH2
(2)
CH3
(2)
CH0SA<4:0>
CHANNEL
SCAN
CSCNA
Alternate
V
REF+
(1)
AVDD
AVSS
VREF-
(1)
Note 1: VREF+, VREF- inputs can be multiplexed with other analog inputs.
2: Channels 1, 2 and 3 are not applicable for the 12-bit mode of operation.
Input Selection
V
REFH
VREFL
VCFG<2:0>