Datasheet

2009-2012 Microchip Technology Inc. DS70591E-page 71
dsPIC33FJ32GS406/606/608/610 and dsPIC33FJ64GS406/606/608/610
TABLE 4-16: HIGH-SPEED PWM REGISTER MAP
File Name
SFR
Addr.
Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
All
Resets
PTCON 0400 PTEN
PTSIDL SESTAT SEIEN EIPU SYNCPOL SYNCOEN SYNCEN SYNCSRC<2:0> SEVTPS<3:0> 0000
PTCON2 0402
—PCLKDIV<2:0>0000
PTPER 0404 PTPER<15:0> FFF8
SEVTCMP 0406 SEVTCMP<15:3>
0000
MDC 040A MDC<15:0> 0000
STCON 040E
SESTAT SEIEN EIPU SYNCPOL SYNCOEN SYNCEN SYNCSRC<2:0> SEVTPS<3:0> 0000
STCON2 0410
—PCLKDIV<2:0>0000
STPER 0412 STPER<15:0> FFF8
SSEVTCMP 0414 SSEVTCMP<15:3>
0000
CHOP 041A CHPCLKEN
CHOP<9:3> 0000
Legend: x = unknown value on Reset, — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
TABLE 4-17: HIGH-SPEED PWM GENERATOR 1 REGISTER MAP
File Name
SFR
Addr.
Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
All
Resets
PWMCON1 0420 FLTSTAT CLSTAT TRGSTAT FLTIEN CLIEN TRGIEN ITB MDCS DTC<1:0> DTCP
MTBS CAM XPRES IUE 0000
IOCON1 0422 PENH PENL POLH POLL PMOD<1:0> OVRENH OVRENL OVRDAT<1:0> FLTDAT<1:0> CLDAT<1:0> SWAP OSYNC 0000
FCLCON1 0424 IFLTMOD CLSRC<4:0> CLPOL CLMOD FLTSRC<4:0> FLTPOL FLTMOD<1:0> 0000
PDC1 0426 PDC1<15:0> 0000
PHASE1 0428 PHASE1<15:0> 0000
DTR1 042A
DTR1<13:0> 0000
ALTDTR1 042C
ALTDTR1<13:0> 0000
SDC1 042E SDC1<15:0> 0000
SPHASE1 0430 SPHASE1<15:0> 0000
TRIG1 0432 TRGCMP<15:3>
0000
TRGCON1 0434 TRGDIV<3:0>
—DTM—TRGSTRT<5:0>0000
STRIG1 0436 STRGCMP<15:3>
0000
PWMCAP1 0438 PWMCAP1<15:3>
0000
LEBCON1 043A PHR PHF PLR PLF FLTLEBEN CLLEBEN
BCH BCL BPHH BPHL BPLH BPLL 0000
LEBDLY1 043C
—LEB<11:3> 0000
AUXCON1 043E HRPDIS HRDDIS
BLANKSEL<3:0> CHOPSEL<3:0> CHOPHEN CHOPLEN 0000
Legend: x = unknown value on Reset, — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.