Datasheet

dsPIC33FJ32GS406/606/608/610 and dsPIC33FJ64GS406/606/608/610
DS70591E-page 450  2009-2012 Microchip Technology Inc.
I2Cx Bus Start/Stop Bits (Slave Mode) ..................... 404
Input Capture x (ICx)................................................. 387
OCx/PWMx ............................................................... 388
Output Compare Operation....................................... 226
Output Compare x (OCx) .......................................... 387
QEA/QEB Input......................................................... 409
QEI Module Index Pulse ........................................... 410
Reset, Watchdog Timer, Oscillator Start-up Timer
and Power-up Timer ......................................... 383
SPIx Master Mode (Full-Duplex, CKE = 0,
CKP = x, SMP = 1)............................................ 393
SPIx Master Mode (Full-Duplex, CKE = 1,
CKP = x, SMP = 1)............................................ 392
SPIx Master Mode (Half-Duplex, Transmit Only,
CKE = 0) ........................................................... 390
SPIx Master Mode (Half-Duplex, Transmit Only,
CKE = 1) ........................................................... 390
SPIx Slave Mode (Full-Duplex, CKE = 0,
CKP = 0, SMP = 0) ........................................... 400
SPIx Slave Mode (Full-Duplex, CKE = 0,
CKP = 1, SMP = 0) ........................................... 398
SPIx Slave Mode (Full-Duplex, CKE = 1,
CKP = 0, SMP = 0) ........................................... 394
SPIx Slave Mode (Full-Duplex, CKE = 1,
CKP = 1, SMP = 0) ........................................... 396
Timer1/2/3 External Clock......................................... 385
TimerQ (QEI Module) External Clock ....................... 411
Timing Requirements
10-Bit, High-Speed ADC ........................................... 407
Auxiliary PLL Clock Specifications............................ 380
Capacitive Loading Requirements on
Output Pins ....................................................... 378
DMA Read/Write ....................................................... 412
ECAN I/O .................................................................. 412
External Clock........................................................... 379
High-Speed PWMx ................................................... 389
I/O ............................................................................. 382
I2Cx Bus Data (Master Mode) .................................. 403
I2Cx Bus Data (Slave Mode) .................................... 405
Input Capture x (ICx)................................................. 387
Output Compare x (OCx) .......................................... 387
PLL Clock Specifications .......................................... 380
QEI External Clock.................................................... 411
QEI Index Pulse ........................................................ 411
Quadrature Decoder ................................................. 410
Reset, Watchdog Timer, Oscillator Start-up Timer,
Power-up Timer and Brown-out Reset.............. 384
Simple OCx/PWMx Mode ......................................... 388
SPIx Master Mode (Full-Duplex, CKE = 0,
CKP = x, SMP = 1)............................................ 393
SPIx Master Mode (Full-Duplex, CKE = 1,
CKP = x, SMP = 1)............................................ 392
SPIx Master Mode (Half-Duplex, Transmit Only) ...... 391
SPIx Slave Mode (Full-Duplex, CKE = 0,
CKP = 0, SMP = 0) ........................................... 401
SPIx Slave Mode (Full-Duplex, CKE = 0,
CKP = 1, SMP = 0) ........................................... 399
SPIx Slave Mode (Full-Duplex, CKE = 1,
CKP = 0, SMP = 0) ........................................... 395
SPIx Slave Mode (Full-Duplex, CKE = 1,
CKP = 1, SMP = 0) ........................................... 397
Timer1 External Clock............................................... 385
Timer2/4 External Clock............................................ 386
Timer3/5 External Clock............................................ 386
Timing Requirements (50 MIPS)
External Clock........................................................... 417
Simple OCx/PWMx Mode ......................................... 420
Timer1 External Clock .............................................. 418
Timer2/4 External Clock ........................................... 419
Timer3/5 External Clock ........................................... 419
Timing Specifications
Comparator Module.................................................. 408
DAC Module ............................................................. 408
DAC Output Buffer.................................................... 409
Trap Conflict Reset (TRAPR) ........................................... 120
U
Universal Asynchronous Receiver
Transmitter (UART) .................................................. 275
V
Voltage Regulator (On-Chip) ............................................ 349
W
Watchdog Timer (WDT)............................................ 345, 349
Programming Considerations ................................... 350
Watchdog Timer Time-out Reset (WDTO) ....................... 120
WWW Address ................................................................. 451
WWW, On-Line Support ..................................................... 14