Datasheet

dsPIC33FJ32GS406/606/608/610 and dsPIC33FJ64GS406/606/608/610
DS70591E-page 136 2009-2012 Microchip Technology Inc.
REGISTER 7-8: IFS3: INTERRUPT FLAG STATUS REGISTER 3
U-0 U-0 U-0 U-0 U-0 R/W-0 R/W-0 U-0
QEI1IF PSEMIF
bit 15 bit 8
U-0 R/W-0 R/W-0 U-0 U-0 R/W-0 R/W-0 U-0
INT4IF INT3IF MI2C2IF SI2C2IF
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 15-11 Unimplemented: Read as ‘0
bit 10 QEI1IF: QEI1 Event Interrupt Flag Status bit
1 = Interrupt request has occurred
0 = Interrupt request has not occurred
bit 9 PSEMIF: PWM Special Event Match Interrupt Flag Status bit
1 = Interrupt request has occurred
0 = Interrupt request has not occurred
bit 8-7 Unimplemented: Read as ‘0
bit 6 INT4IF: External Interrupt 4 Flag Status bit
1 = Interrupt request has occurred
0 = Interrupt request has not occurred
bit 5 INT3IF: External Interrupt 3 Flag Status bit
1 = Interrupt request has occurred
0 = Interrupt request has not occurred
bit 4-3 Unimplemented: Read as ‘0
bit 2 MI2C2IF: I2C2 Master Events Interrupt Flag Status bit
1 = Interrupt request has occurred
0 = Interrupt request has not occurred
bit 1 SI2C2IF: I2C2 Slave Events Interrupt Flag Status bit
1 = Interrupt request has occurred
0 = Interrupt request has not occurred
bit 0 Unimplemented: Read as ‘0