Datasheet

dsPIC33FJ32GP202/204 and dsPIC33FJ16GP304
DS70290J-page 38 © 2007-2011 Microchip Technology Inc.
TABLE 4-8: I2C1 REGISTER MAP
SFR Name
SFR
Addr
Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
All
Resets
I2C1RCV 0200 Receive Register
0000
I2C1TRN 0202 Transmit Register
00FF
I2C1BRG 0204 Baud Rate Generator Register
0000
I2C1CON 0206 I2CEN I2CSIDL SCLREL IPMIEN A10M DISSLW SMEN GCEN STREN ACKDT ACKEN RCEN PEN RSEN SEN
1000
I2C1STAT 0208 ACKSTAT TRSTAT BCL GCSTAT ADD10 IWCOL I2COV D_A P S R_W RBF TBF
0000
I2C1ADD 020A Address Register
0000
I2C1MSK 020C Address Mask Register
0000
Legend: x = unknown value on Reset, — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
TABLE 4-9: UART1 REGISTER MAP
SFR Name
SFR
Addr
Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
All
Resets
U1MODE 0220 UARTEN USIDL IREN RTSMD UEN1 UEN0 WAKE LPBACK ABAUD URXINV BRGH PDSEL<1:0> STSEL
0000
U1STA 0222 UTXISEL1 UTXINV UTXISEL0 UTXBRK UTXEN UTXBF TRMT URXISEL<1:0> ADDEN RIDLE PERR FERR OERR URXDA
0110
U1TXREG 0224 UART Transmit Register
xxxx
U1RXREG 0226 UART Receive Register
0000
U1BRG 0228 Baud Rate Generator Prescaler
0000
Legend: x = unknown value on Reset, — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
TABLE 4-10: SPI1 REGISTER MAP
SFR
Name
SFR
Addr
Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
All
Resets
SPI1STAT 0240 SPIEN SPISIDL —SPIROV SPITBF SPIRBF
0000
SPI1CON1 0242 DISSCK DISSDO MODE16 SMP CKE SSEN CKP MSTEN SPRE<2:0> PPRE<1:0>
0000
SPI1CON2 0244 FRMEN SPIFSD FRMPOL FRMDLY
0000
SPI1BUF 0248 SPI1 Transmit and Receive Buffer Register
0000
Legend: x = unknown value on Reset, — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.