Datasheet

dsPIC33FJXXXMCX06/X08/X10
DS70287C-page 50 © 2009 Microchip Technology Inc.
TABLE 4-10: QEI REGISTER MAP
SFR
Name
Addr
.
Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Reset State
QEI1CON 01E0 CNTERR
QEISIDL INDX UPDN QEIM<2:0> SWPAB PCDOUT TQGATE TQCKPS<1:0> POSRES TQCS UPDN_SRC 0000 0000 0000 0000
DFLT1CON 01E2
IMV<1:0> CEID QEOUT QECK<2:0> 0000 0000 0000 0000
POS1CNT 01E4 Position Counter<15:0> 0000 0000 0000 0000
MAX1CNT 01E6 Maximum Count<15:0> 1111 1111 1111 1111
Legend: u = uninitialized bit, — = unimplemented, read as ‘0
TABLE 4-11: I2C1 REGISTER MAP
SFR Name
SFR
Addr
Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
All
Resets
I2C1RCV 0200 Receive Register
0000
I2C1TRN 0202 Transmit Register
00FF
I2C1BRG 0204 Baud Rate Generator Register
0000
I2C1CON 0206 I2CEN I2CSIDL SCLREL IPMIEN A10M DISSLW SMEN GCEN STREN ACKDT ACKEN RCEN PEN RSEN SEN
1000
I2C1STAT 0208 ACKSTAT TRSTAT BCL GCSTAT ADD10 IWCOL I2COV D_A P S R_W RBF TBF
0000
I2C1ADD 020A Address Register
0000
I2C1MSK 020C Address Mask Register
0000
Legend: x = unknown value on Reset, — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
TABLE 4-12: I2C2 REGISTER MAP
SFR Name
SFR
Addr
Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
All
Resets
I2C2RCV 0210 Receive Register
0000
I2C2TRN 0212 Transmit Register
00FF
I2C2BRG 0214 Baud Rate Generator Register
0000
I2C2CON 0216 I2CEN I2CSIDL SCLREL IPMIEN A10M DISSLW SMEN GCEN STREN ACKDT ACKEN RCEN PEN RSEN SEN
1000
I2C2STAT 0218 ACKSTAT TRSTAT BCL GCSTAT ADD10 IWCOL I2COV D_A P S R_W RBF TBF
0000
I2C2ADD 021A Address Register
0000
I2C2MSK 021C Address Mask Register
0000
Legend: x = unknown value on Reset, — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.