Datasheet

2011-2012 Microchip Technology Inc. DS70652E-page 117
dsPIC33FJ16(GP/MC)101/102 AND dsPIC33FJ32(GP/MC)101/102/104
REGISTER 7-20: IPC5: INTERRUPT PRIORITY CONTROL REGISTER 5
U-0 U-0 U-0 U-0 U-0 U-0 U-0 U-0
bit 15 bit 8
U-0 U-0 U-0 U-0 U-0 R/W-1 R/W-0 R/W-0
INT1IP<2:0>
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 15-3 Unimplemented: Read as ‘0
bit 2-0 INT1IP<2:0>: External Interrupt 1 Priority bits
111 = Interrupt is Priority 7 (highest priority interrupt)
001 = Interrupt is Priority 1
000 = Interrupt source is disabled
REGISTER 7-21: IPC6: INTERRUPT PRIORITY CONTROL REGISTER 6
U-0 R/W-1 R/W-0 R/W-0 U-0 U-0 U-0 U-0
T4IP<2:0>
(1)
bit 15 bit 8
U-0 U-0 U-0 U-0 U-0 U-0 U-0 U-0
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 15 Unimplemented: Read as ‘0
bit 14-12 T4IP<2:0>: Timer4 Interrupt Priority bits
(1)
111 = Interrupt is Priority 7 (highest priority interrupt)
001 = Interrupt is Priority 1
000 = Interrupt source is disabled
bit 11-0 Unimplemented: Read as ‘0
Note 1: These bits are available in dsPIC33FJ32(GP/MC)10X devices only.