Datasheet
2011-2012 Microchip Technology Inc. DS70652E-page 377
dsPIC33FJ16(GP/MC)101/102 AND dsPIC33FJ32(GP/MC)101/102/104
PORTA
Register Map............................................................... 70
Power-Saving Features .................................................... 133
Clock Frequency and Switching................................ 133
Program Address Space..................................................... 49
Construction................................................................ 79
Data Access from Program Memory Using
Program Space Visibility..................................... 82
Data Access from Program Memory Using
Table Instructions ............................................... 81
Data Access from, Address Generation...................... 80
Memory Map
dsPIC33FJ16(GP/MC)101/102 Devices ............. 49
dsPIC33FJ32(GP/MC)101/102/104 Devices ...... 50
Table Read Instructions
TBLRDH ............................................................. 81
TBLRDL .............................................................. 81
Visibility Operation ...................................................... 82
Program Memory
Interrupt Vector ........................................................... 51
Organization................................................................ 51
Reset Vector ............................................................... 51
Programmer’s Model........................................................... 39
R
Reader Response ............................................................. 381
Real-Time Clock and Calendar (RTCC)............................ 241
Register Maps
6-Output PWM1, dsPIC33FJXXMC10X Devices........ 61
ADC1, dsPIC33FJ32(GP/MC)104 Devices................. 65
ADC1, dsPIC33FJXX(GP/MC)101 Devices................ 63
ADC1, dsPIC33FJXX(GP/MC)102 Devices................ 64
Change Notification, dsPIC33FJ32(GP/MC)104
Devices ............................................................... 58
Change Notification, dsPIC33FJXX(GP/MC)102
Devices ............................................................... 58
Change Notification, dsPIC33FJXXGP101
Devices ............................................................... 58
Change Notification, dsPIC33FJXXMC101
Devices ............................................................... 58
Comparator ................................................................. 67
Configuration Flash Words
dsPIC33FJ16(GP/MC)10X Devices.................. 260
dsPIC33FJ32(GP/MC)10X Devices.................. 260
Configuration Shadow Registers .............................. 260
CPU Core.................................................................... 56
CTMU.......................................................................... 66
I2C1 ............................................................................ 62
Input Capture .............................................................. 61
Interrupt Controller ...................................................... 59
NVM ............................................................................ 72
Output Compare ......................................................... 61
PAD Configuration ...................................................... 66
PMD ............................................................................ 72
PORTA, dsPIC33FJ32(GP/MC)104 Devices.............. 70
PORTA, dsPIC33FJXX(GP/MC)101/102 Devices ...... 69
PORTB, dsPIC33FJXX(GP/MC)102 and
dsPIC33FJ32(GP/MC)104 Devices .................... 70
PORTB, dsPIC33FJXXGP101 Devices ...................... 71
PORTB, dsPIC33FJXXMC101 Devices................ 70, 71
PORTC, dsPIC33FJ32(GP/MC)104 Devices.............. 71
PPS Input.................................................................... 67
PPS Output, dsPIC33FJ32(GP/MC)104 Devices ....... 69
PPS Output, dsPIC33FJXX(GP/MC)102 Devices ...... 68
PPS Output, dsPIC33FJXXGP101 Devices ............... 68
PPS Output, dsPIC33FJXXMC101 Devices ............... 68
Real-Time Clock and Calendar .................................. 66
SPI1............................................................................ 62
System Control ........................................................... 72
Timers, dsPIC33FJ16(GP/MC)10X Devices .............. 60
Timers, dsPIC33FJ32(GP/MC)10X Devices .............. 60
UART1........................................................................ 62
Registers
AD1CHS0 (ADC1 Input Channel 0 Select)............... 225
AD1CHS123 (ADC1 Input Channel 1, 2, 3
Select) .............................................................. 224
AD1CON1 (ADC1 Control 1) .................................... 220
AD1CON2 (ADC1 Control 2) .................................... 222
AD1CON3 (ADC1 Control 3) .................................... 223
AD1CSSL (ADC1 Input Scan Select Low) ............... 226
AD1PCFGL (ADC1 Port Configuration Low) ............ 227
ALCFGRPT (Alarm Configuration) ........................... 246
ALRMVAL (Alarm Minutes and Seconds Value,
ALRMPTR Bits = 00) ........................................ 252
ALRMVAL (Alarm Month and Day Value,
ALRMPTR Bits = 10) ................................ 250, 251
ALRMVAL (Alarm Weekday and Hours Value,
ALRMPTR Bits = 01) ........................................ 251
CLKDIV (Clock Divisor) ............................................ 130
CMSTAT (Comparator Status) ................................. 232
CMxCON (Comparator x Control) ............................ 233
CMxFLTR (Comparator x Filter Control) .................. 239
CMxMSKCON (Comparator x Mask
Gating Control) ................................................. 237
CMxMSKSRC (Comparator x Mask
Source Select).................................................. 235
CORCON (Core Control)...................................... 42, 99
CTMUCON1 (CTMU Control 1)................................ 255
CTMUCON2 (CTMU Control 2)................................ 256
CTMUICON (CTMU Current Control) ....................... 257
CVRCON (Comparator Voltage Reference
Control)............................................................. 240
DEVID (Device ID).................................................... 263
DEVREV (Device Revision)...................................... 263
I2CxCON (I2Cx Control)........................................... 203
I2CxMSK (I2Cx Slave Mode Address Mask)............ 207
I2CxSTAT (I2Cx Status) ........................................... 205
ICxCON (Input Capture x Control)............................ 174
IEC0 (Interrupt Enable Control 0) ............................. 108
IEC1 (Interrupt Enable Control 1) ............................. 109
IEC2 (Interrupt Enable Control 2) ............................. 110
IEC3 (Interrupt Enable Control 3) ............................. 110
IEC4 (Interrupt Enable Control 4) ............................. 111
IFS0 (Interrupt Flag Status 0) ................................... 103
IFS1 (Interrupt Flag Status 1) ................................... 105
IFS2 (Interrupt Flag Status 2) ................................... 106
IFS3 (Interrupt Flag Status 3) ................................... 106
IFS4 (Interrupt Flag Status 4) ................................... 107
INTCON1 (Interrupt Control 1) ................................. 100
INTCON2 (Interrupt Control 2) ................................. 102
INTTREG (Interrupt Control and Status) .................. 123
IPC0 (Interrupt Priority Control 0) ............................. 112
IPC1 (Interrupt Priority Control 1) ............................. 113
IPC14 (Interrupt Priority Control 14) ......................... 119
IPC15 (Interrupt Priority Control 15) ......................... 120
IPC16 (Interrupt Priority Control 16) ......................... 121
IPC19 (Interrupt Priority Control 19) ......................... 122
IPC2 (Interrupt Priority Control 2) ............................. 114
IPC3 (Interrupt Priority Control 3) ............................. 115
IPC4 (Interrupt Priority Control 4) ............................. 116
IPC5 (Interrupt Priority Control 5) ............................. 117