Information
2012-2013 Microchip Technology Inc. DS80000540E-page 7
dsPIC33FJ06GS001/101A/102A/202A and dsPIC33FJ09GS302
12. Module: Comparator
The comparator and DAC modules do not function
when both of the following are true:
• the External Voltage Reference is selected
(EXTREF = 1), and
• the external voltage reference is less than
1.6V.
Work around
Use the INTREF or AVDD/2 references, whenever
possible.
If the External Voltage Reference must be used,
be aware that the published specifications for
EXTREF define an input voltage range of 0V
minimum and (AV
DD – 1.6)V maximum. For the
affected silicon revisions, the operational input
voltage limits of EXTREF are 1.6V minimum and
(AV
DD – 0.6)V maximum.
Affected Silicon Revisions
13. Module: PWM
The PWMx generator may not assert dead time on
the edges of transitions. This has been observed
when all of the following conditions are present:
• The PWMx generator is configured to operate
in Complementary mode with the
independent time base or master time base;
• Immediate update is enabled; and
• The value in the PDCx register is updated in
such a manner that the PWMxH and PWMxL
outputs make an immediate transition.
The current duty cycle, PDC
OLD, newly calculated
duty cycle, PDC
NEW, and the point at which the
write to the Duty Cycle register occurs within the
PWMx time base, will determine if the PWMxH and
PWMxL outputs make an immediate transition.
PWMxH and PWMxL outputs make an immediate
transition if the Duty Cycle register is written with a
new value, PDC
NEW, at a point of time when the
PWMx time base is counting a value that is in
between PDC
NEW and PDCOLD. Additionally,
writing to the Duty Cycle register close to the
instant of time where dead time is being applied
may result in reduced dead time, effective on the
PWMxH and PWMxL transition edges.
In Figure 1 (following page), if the duty cycle write
occurred in the shaded box, then PWMxH and
PWMxL will make an immediate transition without
dead time.
Work around
None. However, in most applications the duty
cycle update timing can be controlled using the
TRIGx trigger or Special Event Trigger such that
the above mentioned conditions are avoided
altogether.
Affected Silicon Revisions
A1
X
A1
X