Information

dsPIC33FJ06GS001/101A/102A/202A and dsPIC33FJ09GS302
DS80000540E-page 10  2012-2013 Microchip Technology Inc.
17. Module: PWM
When External Period Reset mode is enabled, a
Reset signal, asserted during the PWM ON time,
and that continues to be asserted afterwards, will
cause the PWM period to be reset immediately
after the end of the PWM ON time.
The expected behavior is for the External Reset
Signal to be ignored if it is still active at the end of
the PWM ON time.
Work around
Ensure that the External Period Reset signal is
asserted during the PWM OFF time, and
deasserted before the end of the PWM ON time.
Affected Silicon Revisions
A1
X