Information

dsPIC33FJ06GS101/X02 and dsPIC33FJ16GSX02/X04
DS80000439N-page 12  2009-2013 Microchip Technology Inc.
31. Module: ADC
If the ADC module is in an enabled state when the
device enters Sleep mode as a result of executing
a PWRSAV #0 instruction, the device power-down
current (I
PD) may exceed the specifications listed
in the device data sheet. This may happen even if
the ADC module is disabled by clearing the ADON
bit prior to entering Sleep mode.
Work arounds
Work around 1:
In order to remain within the I
PD specifications
listed in the device data sheet, the user software
must completely disable the ADC module by
setting the ADC Module Disable bit in the
corresponding Peripheral Module Disable x regis-
ter (PMDx), prior to executing a PWRSAV #0
instruction.
Work around 2:
If the ADC module was previously initialized and
enabled, before entering Sleep, execute the lines
of code provided in Example 2.
EXAMPLE 2:
Affected Silicon Revisions
Note: The ADC module must be reinitialized by
the user application before resuming ADC
operation.
Note: Unlike Work around 1, the user
application does not need to reinitialize
the ADC module; however, it is necessary
to re-enable the ADC module by setting
the ADON bit after waking from Sleep.
AD1CON1bits.ADON = 0; //Disable the ADC module
__asm__ volatile ("REPEAT #50"); //Wait 50 T
CY
__asm__ volatile ("NOP"); //Repeat NOP 51 times
Sleep(); // Execute PWRSAV #0 and go to Sleep
A2 A3 A4
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